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Showing items 11-35 of 114  (5 Page(s) Totally)
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Institution Date Title Author
國立中山大學 2007 嵌入式晶片系統資料路徑設計之算術功能單元產生器(III) 蕭勝夫; Shen-Fu Hsiao
國立中山大學 2007 具有即時效能/功率監控功能的高效率可程式化三維電腦繪圖晶片系統-軟硬體開發及整合---子計畫四:三維電腦繪圖晶片系統之Vertex Shader 處理器設計(I) 蕭勝夫; Shen-Fu Hsiao; 莊作彬; Tso-Bing Juang
國立中山大學 2006-12 Integrated System Architecture Synthesis of Distributed Embedded Systems for Multimedia Applications Jin-Lin Liu; Shiann-Rong Kuang; Shen-Fu Hsiao
國立中山大學 2006-12 An Automatic Cache Generator Based on Content-Addressable Memory Shen-Fu Hsiao; Sze-Yun Lin; Tze-Chorng Cheng; Ming-Yu Tsai
國立中山大學 2006-12 Efficient Pass-Transistor-Logic Synthesis for Sequential Circuits Shen-Fu Hsiao; Ming-Yu Tsai; Chia-Sheng Wen
國立中山大學 2006-08 A 3D GrAPHICS SOC FOR DIGITAL TELEVISION Ruei-Ting Gu; Tse-Chen Yeh; Ken-Yu Lin; Chih-Yuen Lee; Ting-Yun Huang; Chung-Hua Tsai; Chung-Nan Lee; Ming-Chao Chiang; Shen-Fu Hsiao; Yun-Nan Chang; Ing-Jer Huang
國立中山大學 2006-08 Design and Verification of a Platform-Based Low-Cost 3D Graphics Geometry Engine Using Area-Reduced Arithmetic Units Shen-Fu Hsiao; Ting-Yuan Huang; Tze-Chieng Tieng
國立中山大學 2006-08 Novel Memory Organization and Circuit Designs for Efficient Data Access in Applications of 3D Graphics and Multimedia Coding Shen-Fu Hsiao; Yo-Chi Chen; Ming-Yu Tsai; Tze-Chong Cheng
國立中山大學 2006-03 Memory-Free Low-Cost Designs of Advanced Encryption Standard Using Common Subexpression Elimination for Sub-functions in Transformations Shen-Fu Hsiao;Ming-Chih Chen;Chia-Shin Tu
國立中山大學 2006 嵌入式晶片系統資料路徑設計之算術功能單元產生器(II) 蕭勝夫; Shen-Fu Hsiao
國立中山大學 2005-5 An Efficient Pass-Transistor-Logic Synthesizer Using Multiplexers and Inverters Only Shen-Fu Hsiao; Ming-Yu Tsai; Ming-Chih Chen; Chia-Sheng Wen
國立中山大學 2005-10 System-on-Chip Implementation of the Whole Advanced Encryption Standard (AES) Processor Using Reduced XOR-based Sum-of-Product Operations Shen-Fu Hsiao;Ming-Chih Chen;Ming-Yu Tsai;Chi-Chen Lin
國立中山大學 2005-09 Efficient Substructure Sharing Methods for Optimizing the Inner-Product Operations in Rijndael Advanced Encryption Standard Shen-Fu Hsiao;Ming-Chih Chen
國立中山大學 2005-08 Efficient VLSI Implementations of Fast Multiplierless Approximated DCT using Parameterized Hardware Modules Shen-Fu Hsiao;Yu-Hen Hu;Tso-Bing Juang;Chung-Han Lee
國立中山大學 2005-07 A Cell-Driven Multiplier Generator with Delay Optimization of Partial Products Compression and an Efficient Partition Technique for the Final Addition Tso-Bing Juang;Shen-Fu Hsiao;Ming-Yu Tsai;Jeng-Hsiung Jan
國立中山大學 2005-06 Low-Error Carry-Free Fixed-Width Multipliers with Low-Cost Compensation Circuits Tso-Bing Juang;Shen-Fu Hsiao
國立中山大學 2005 數位電視之三維(3D)圖形加速處理器之軟硬體技術及系統整合(I) 黃英哲; Ing-Jer Huang; 蕭勝夫; Shen-Fu Hsiao; 張雲南; Yun-Nan Chang; 李宗南; Chung-Nan Lee; 江明朝; Ming-Chao Chiang
國立中山大學 2004-12 Two Efficient Area Reduction Methods for Implementations of the Rijndael Advanced Encryption Standard Shen-Fu Hsiao; Ming-Chih Chen
國立中山大學 2004-12 Low-error Carry-Free Fixed-Width Multipliers and Their Application to DCT/IDCT Tso-Bing Juang; Shen-Fu Hsiao; Shiann-Rong Kuang; Ming-Yu Tsai
國立中山大學 2004-08 Para-CORDIC: Parallel CORDIC Rotation Algorithm Tso-Bing Juang;Shen-Fu Hsiao;Ming-Yu Tsai
國立中山大學 2004-02 A Memory-Efficient and High-Speed Sine/Cosine Generator Based on Parallel CORDIC Rotations Shen-Fu Hsiao;Yu-Hen Hu;Tso-Bing Juang
國立中山大學 2003-12 Efficient Substructure Sharing Method for the Forward and Inverse MixColumns Operations in Rijndael AES Ming-Chih Chen; Shen-Fu Hsiao
國立中山大學 2003-12 Design of Fixed-Length Multipliers Using Radix-2 Signed-Digit Redundant Numbers Tso-Bing Juang; Shen-Fu Hsiao; Ming-Yu Tsai
國立中山大學 2003-08 Architectural Optimization for the forward and Inverse MixColumn Operations in Rijndael AES Ming-Chih Chen; Shen-Fu Hsiao; Ming-Yu Tsai
國立中山大學 2003-08 A ROM-Free CORDIC-Based Sine/Cosine Function Generator Based on Concurrently Predicted Rotation Directions Shen-Fu Hsiao; Tso-Bing Juang

Showing items 11-35 of 114  (5 Page(s) Totally)
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