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Institution	Date	Title	Author
國立中山大學	2006-08	A 3D GrAPHICS SOC FOR DIGITAL TELEVISION	Ruei-Ting Gu; Tse-Chen Yeh; Ken-Yu Lin; Chih-Yuen Lee; Ting-Yun Huang; Chung-Hua Tsai; Chung-Nan Lee; Ming-Chao Chiang; Shen-Fu Hsiao; Yun-Nan Chang; Ing-Jer Huang
國立中山大學	2006-08	Design and Verification of a Platform-Based Low-Cost 3D Graphics Geometry Engine Using Area-Reduced Arithmetic Units	Shen-Fu Hsiao; Ting-Yuan Huang; Tze-Chieng Tieng
國立中山大學	2006-08	Novel Memory Organization and Circuit Designs for Efficient Data Access in Applications of 3D Graphics and Multimedia Coding	Shen-Fu Hsiao; Yo-Chi Chen; Ming-Yu Tsai; Tze-Chong Cheng
國立中山大學	2006-03	Memory-Free Low-Cost Designs of Advanced Encryption Standard Using Common Subexpression Elimination for Sub-functions in Transformations	Shen-Fu Hsiao;Ming-Chih Chen;Chia-Shin Tu
國立中山大學	2006	嵌入式晶片系統資料路徑設計之算術功能單元產生器(II)	蕭勝夫; Shen-Fu Hsiao
國立中山大學	2005-5	An Efficient Pass-Transistor-Logic Synthesizer Using Multiplexers and Inverters Only	Shen-Fu Hsiao; Ming-Yu Tsai; Ming-Chih Chen; Chia-Sheng Wen
國立中山大學	2005-10	System-on-Chip Implementation of the Whole Advanced Encryption Standard (AES) Processor Using Reduced XOR-based Sum-of-Product Operations	Shen-Fu Hsiao;Ming-Chih Chen;Ming-Yu Tsai;Chi-Chen Lin
國立中山大學	2005-09	Efficient Substructure Sharing Methods for Optimizing the Inner-Product Operations in Rijndael Advanced Encryption Standard	Shen-Fu Hsiao;Ming-Chih Chen
國立中山大學	2005-08	Efficient VLSI Implementations of Fast Multiplierless Approximated DCT using Parameterized Hardware Modules	Shen-Fu Hsiao;Yu-Hen Hu;Tso-Bing Juang;Chung-Han Lee
國立中山大學	2005-07	A Cell-Driven Multiplier Generator with Delay Optimization of Partial Products Compression and an Efficient Partition Technique for the Final Addition	Tso-Bing Juang;Shen-Fu Hsiao;Ming-Yu Tsai;Jeng-Hsiung Jan
國立中山大學	2005-06	Low-Error Carry-Free Fixed-Width Multipliers with Low-Cost Compensation Circuits	Tso-Bing Juang;Shen-Fu Hsiao
國立中山大學	2005	數位電視之三維(3D)圖形加速處理器之軟硬體技術及系統整合(I)	黃英哲; Ing-Jer Huang; 蕭勝夫; Shen-Fu Hsiao; 張雲南; Yun-Nan Chang; 李宗南; Chung-Nan Lee; 江明朝; Ming-Chao Chiang
國立中山大學	2004-12	Two Efficient Area Reduction Methods for Implementations of the Rijndael Advanced Encryption Standard	Shen-Fu Hsiao; Ming-Chih Chen
國立中山大學	2004-12	Low-error Carry-Free Fixed-Width Multipliers and Their Application to DCT/IDCT	Tso-Bing Juang; Shen-Fu Hsiao; Shiann-Rong Kuang; Ming-Yu Tsai
國立中山大學	2004-08	Para-CORDIC: Parallel CORDIC Rotation Algorithm	Tso-Bing Juang;Shen-Fu Hsiao;Ming-Yu Tsai
國立中山大學	2004-02	A Memory-Efficient and High-Speed Sine/Cosine Generator Based on Parallel CORDIC Rotations	Shen-Fu Hsiao;Yu-Hen Hu;Tso-Bing Juang
國立中山大學	2003-12	Efficient Substructure Sharing Method for the Forward and Inverse MixColumns Operations in Rijndael AES	Ming-Chih Chen; Shen-Fu Hsiao
國立中山大學	2003-12	Design of Fixed-Length Multipliers Using Radix-2 Signed-Digit Redundant Numbers	Tso-Bing Juang; Shen-Fu Hsiao; Ming-Yu Tsai
國立中山大學	2003-08	Architectural Optimization for the forward and Inverse MixColumn Operations in Rijndael AES	Ming-Chih Chen; Shen-Fu Hsiao; Ming-Yu Tsai
國立中山大學	2003-08	A ROM-Free CORDIC-Based Sine/Cosine Function Generator Based on Concurrently Predicted Rotation Directions	Shen-Fu Hsiao; Tso-Bing Juang
國立中山大學	2003-08	High-Radix Low-Complexity Architectures for Long-Length DCT Using Conventional Arithmetic and ROM-Based Distributed Arithmeti c	Shen-Fu Hsiao; Yu-Hen Hu
國立中山大學	2003-01	Design and Implementation of A Video-Oriented Network-Interface-Card System	Ming-Chih Chen; Shen-Fu Hsiao; Cheng-Hsien Yang
國立中山大學	2003	邏輯和算術運算單元之量子電路設計	蕭勝夫; Shen-Fu Hsiao
國立中山大學	2002-12	Partitioning Methodology of the Final Adder in a Tree Structure Parallel Multiplier Generator	Tso-Bing Juang; Jeng-Hsin Jan; Ming-Yu Tsai; Shen-Fu Hsiao
國立中山大學	2002-11	Design and Implementation of a High-Performance Video-Oriented Network-Interface-Card System	Ming-Chih Chen; Shen-Fu Hsiao; Cheng-Hsien Yang
國立中山大學	2002-09	Design and Implementation of a Specific Network-Interface-Card for Accelerating Video Delivery	Ming-Chih Chen; Shen-Fu Hsiao; Cheng-Hsien Yang
國立中山大學	2002-08	High-Performance Multiplexer-Based Logic Synthesis Using Pass-Transistor Logic	Shen-Fu Hsiao;Jia-Siang Yeh;Da-Yen Chen
國立中山大學	2002-08	High-Performance Logic Synthesis Based on Pass-Transistor Logic	Ming-Yu Tsai; Chia-Sheng Wen; Shen-Fu Hsiao
國立中山大學	2002-08	A High-Performance Function Generator for Multiplier-Based Arithmetic Operations	Tso-Bing Juang; Jeng-Hsin Jan; Ming-Yu Tsai; Shen-Fu Hsiao
國立中山大學	2002-08	Design and Implementation of a Video-Oriented Network-Interface-Card System	Ming-Chih Chen; Shen-Fu Hsiao; Cheng-Hsien Yang
國立中山大學	2002-04	New Matrix Formulation for Two-Dimensional DCT/IDCT Computation and Its Distributed-Memory VLSI Implementation	Shen-Fu Hsiao;Jian-Ming Tseng
國立中山大學	2002	以開關電晶體元件庫為主的邏輯合成器和佈局產生器	蕭勝夫; Shen-Fu Hsiao
國立中山大學	2002	單晶片封裝系統數位電視多重標準接收器設計與實作---子計畫IV：數位電視解碼器之數位信號處理及系統控制之軟硬體模組設計及實作	黃英哲; Ing-Jer Huang; 蕭勝夫; Shen-Fu Hsiao
國立中山大學	2001-11	A New Hardware-Efficient Algorithm and Architecture for Computation of 2-D DCT on a Linear Systolic Array	Shen-Fu Hsiao;Wei-Ren Shiue
國立中山大學	2001-09	Area-Efficient Carry-Save Full Adder Design Using Pass Transistors	Tso-Bing Juan; Ming-Ju Tsia; Shen-Fu Hsiao
國立中山大學	2001-09	Design of a CORDIC-Based Sin/Cos Intellectual Property Using Predictable Sign Bits	Tso-Bing Juan; Chau-Chuang Huang; Shen-Fu Hsiao
國立中山大學	2001-08	Novel High-Performance and Area-Efficient D-Flip-Flop Circuits	Ming-Yu Tsai; Tso-Bing Juang; Shen-Fu Hsiao
國立中山大學	2001-08	A Multiplier-Based Arithmetic Function Generator for Digital Signal Processing Applications	Shen-Fu Hsiao; Tso-Bing Juang; Jeng Hsium Jan; Ming Yu Tsai
國立中山大學	2001-07	Parallel, Pipelined and Folded Architectures for Computation of 1-D and 2-D DCT in Image and Video Coding	Shen-Fu Hsiao;Jia-Ming Tseng
國立中山大學	2000-12	Robust Spatial-Domain Watermarking Methods Based on a Weighting Table with Fine Tune Technique	Mu-San Chung; Kai-Hsiang Chang; Shen-Fu Hsiao
國立中山大學	2000-11	Design of Low-Cost and High-Throughput Linear Arrays for DFT Computations: Algorithms, Architectures and Implementations	Shen-Fu Hsiao;Wei-Ren Shiue
國立中山大學	2000-10	Design and Implementation of a Novel Linear-Array DCT/IDCT Processor with Complexity of Order logN	Shen-Fu Hsiao;Wei-Ren Shiue;Jian-Ming Tseng
國立中山大學	2000-08	VLSI Design of an Efficient Embedded Zerotree Wavelet Coder with Function of Digital Watermarking	Shen-Fu Hsiao;Yor-Chin Tai;Kai-Hsiang Chang
國立中山大學	2000-08	CORDIC-Based Signed-Bit Predictable SIN/COS Generator	Chao-Chuan Huang; Tso-Bing Juan; Shen-Fu Hsiao
國立中山大學	2000-07	Design of a Unified Arithmetic Processor Based on Redundant Constant-Factor CORDIC with Merged Scaling Operation	Shen-Fu Hsiao;Chun-Yi Lau
國立中山大學	2000-06	Redunant Constant-Factor Implementation of Multi-dimensional CORDIC and Its Application to Complex SVD	Shen-Fu Hsiao;Chun-Yi Lau;Jean-Marc Delosme
國立中山大學	2000-06	VLSI Design of an Efficient Embedded Zerotree Wavelet Coder with Function of Digital Watermarking	Shen-Fu Hsiao; Yor-Chin Tai; Kai-Hsiang Chang
國立中山大學	2000-06	Low-Cost Unified Architectures for the Computation of Discrete Trigonometric Transforms	Shen-Fu Hsiao; Wei-Ren Shiue
國立中山大學	2000-05	High-Performance Multiplexer-Based Logic Synthesis Using Pass-Transistor Logic	Shen-Fu Hsiao; Jia-Siang Yeh; Da-Yen Chen
國立中山大學	2000-02	Discussions on the CORDIC Processor Using Leading Zero Detectors	Tso-Bing Juang; Shen-Fu Hsiao

Showing items 16-65 of 114 (3 Page(s) Totally)
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