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機構	日期	題名	作者
國立中山大學	2001-09	Design of a CORDIC-Based Sin/Cos Intellectual Property Using Predictable Sign Bits	Tso-Bing Juan; Chau-Chuang Huang; Shen-Fu Hsiao
國立中山大學	2001-08	Novel High-Performance and Area-Efficient D-Flip-Flop Circuits	Ming-Yu Tsai; Tso-Bing Juang; Shen-Fu Hsiao
國立中山大學	2001-08	A Multiplier-Based Arithmetic Function Generator for Digital Signal Processing Applications	Shen-Fu Hsiao; Tso-Bing Juang; Jeng Hsium Jan; Ming Yu Tsai
國立中山大學	2001-07	Parallel, Pipelined and Folded Architectures for Computation of 1-D and 2-D DCT in Image and Video Coding	Shen-Fu Hsiao;Jia-Ming Tseng
國立中山大學	2000-12	Robust Spatial-Domain Watermarking Methods Based on a Weighting Table with Fine Tune Technique	Mu-San Chung; Kai-Hsiang Chang; Shen-Fu Hsiao
國立中山大學	2000-11	Design of Low-Cost and High-Throughput Linear Arrays for DFT Computations: Algorithms, Architectures and Implementations	Shen-Fu Hsiao;Wei-Ren Shiue
國立中山大學	2000-10	Design and Implementation of a Novel Linear-Array DCT/IDCT Processor with Complexity of Order logN	Shen-Fu Hsiao;Wei-Ren Shiue;Jian-Ming Tseng
國立中山大學	2000-08	VLSI Design of an Efficient Embedded Zerotree Wavelet Coder with Function of Digital Watermarking	Shen-Fu Hsiao;Yor-Chin Tai;Kai-Hsiang Chang
國立中山大學	2000-08	CORDIC-Based Signed-Bit Predictable SIN/COS Generator	Chao-Chuan Huang; Tso-Bing Juan; Shen-Fu Hsiao
國立中山大學	2000-07	Design of a Unified Arithmetic Processor Based on Redundant Constant-Factor CORDIC with Merged Scaling Operation	Shen-Fu Hsiao;Chun-Yi Lau
國立中山大學	2000-06	Redunant Constant-Factor Implementation of Multi-dimensional CORDIC and Its Application to Complex SVD	Shen-Fu Hsiao;Chun-Yi Lau;Jean-Marc Delosme
國立中山大學	2000-06	VLSI Design of an Efficient Embedded Zerotree Wavelet Coder with Function of Digital Watermarking	Shen-Fu Hsiao; Yor-Chin Tai; Kai-Hsiang Chang
國立中山大學	2000-06	Low-Cost Unified Architectures for the Computation of Discrete Trigonometric Transforms	Shen-Fu Hsiao; Wei-Ren Shiue
國立中山大學	2000-05	High-Performance Multiplexer-Based Logic Synthesis Using Pass-Transistor Logic	Shen-Fu Hsiao; Jia-Siang Yeh; Da-Yen Chen
國立中山大學	2000-02	Discussions on the CORDIC Processor Using Leading Zero Detectors	Tso-Bing Juang; Shen-Fu Hsiao
國立中山大學	2000-01	An Efficient Synthesizer for Generation of Fast Parallel Multipliers	Shen-Fu Hsiao;Ming-Rong Jiang
國立中山大學	1999-08	A Cost-Efficient and Fully-Pipelinable Linear Architecture for Discrete Cosine Transform	Shen-Fu Hsiao;Wei-Ren Shiue;Jian-Ming Tseng
國立中山大學	1999-08	Direct Implementation of N x N 2-D DCT on a Pipelinable Linear-Array without Intermediate Transpose Memory	Shen-Fu Hsiao; Jian-Ming Tseng
國立中山大學	1999-08	A High-Speed Universal Arithmetic Processor Based on Redundant CORDIC with Constant Scaling Factor and Merged Scaling Operation	Shen-Fu Hsiao; Chun-Yi Lau
國立中山大學	1999-08	A Low Power and Fast CORDIC Processor for Vector Rotation	Tso-Bing Juang; Shen-Fu Hsiao
國立中山大學	1999-08	Direct Implementation of 2-D DCT on a Low-Cost Linear-Array Architecture without Intermediate Transpose Memory	Shen-Fu Hsiao; Jian-Ming Tseng
國立中山大學	1999-06	An Efficient Synthesizer for Generation of Fast Parallel Multipliers	Shen-Fu Hsiao; Ming-Rong Jiang
國立中山大學	1999-06	A Cost-Efficient and Fully-Pipelinable Linear Architecture for Discrete Cosine Transform	Shen-Fu Hsiao; Wei-Ren Shiue; Jian-Ming Tseng
國立中山大學	1999-05	A High-Speed Constant-Factor Redundant CORDIC Processor without Extra Correcting or Scaling Iterations	Shen-Fu Hsiao
國立中山大學	1999-03	New Hardware-Efficient Algorithms and Architectures for Computation of 2-D DCT on Linear Systolic Arrays	Shen-Fu Hsiao; Wei-Ren Shiue
國立中山大學	1999-03	A High-Throughput, Low-Power Architecture and its VLSI Implementation for DFT/IDFT Computation	Wei-Ren Shiue; Shen-Fu Hsiao
國立中山大學	1999	數位運動控制技術之發展與智慧型馬達控制IC之研製---數位馬達控制協同處理器之研製	蕭勝夫; Shen-Fu Hsiao
國立中山大學	1998-12	Design, Implementation and Analysis of a New Redundant CORDIC Processor with Constant Scaling Factor and Regular Structure	Shen-Fu Hsiao;Jen-Yin Chen
國立中山大學	1998-12	Design, Implementation and Error Analysis of Redundant CORDIC Processors for Fast Vector Rotation and Trigonometric Function Evaluation	Shen-Fu Hsiao; Chung-Yi Liu; Jen-Yin Chen
國立中山大學	1998-08	A Hybrid W-Transform-Based Coding and Its VLSI Realization for Image Compression	Shen-Fu Hsiao;Wen-Chen Huang;Chungnan Lee;Cheng-Chung Hsu
國立中山大學	1998-08	High-Performance Multiplier Synthesizer Based on Optimized Partial Product Reduction Tree	Shen-Fu Hsiao; Ming-Rong Jiang
國立中山大學	1998-08	High Performance Multiplexer-Based Logic Synthesis Using Pass-Transistor Circuits	Shen-Fu Hsiao; Jia-Siang Yeh
國立中山大學	1998-08	New Hardware-Efficient Architectures for Discrete Fourier Transfor	Shen-Fu Hsiao; Wie-Ren Shiue
國立中山大學	1998-06	Top-Down Logic Design with Pass-Transistor Cells And an Efficient Synthesizer	Shen-Fu Hsiao;Jia-Siang Yeh
國立中山大學	1998-06	A Hybrid W-Transform-Based Coding and Its VLSI Realization for Image Compression	Wen-Chen Huang; Shen-Fu Hsiao; Chung-Nan Lee; Cheng-Chung Hsu
國立中山大學	1998-05	Analysis and Implementation of Data Partition and Load Balancing for Matrix Multiplication on Both Controllable and Non-controllable Network of Workstations	Shen-Fu Hsiao; Chung-Yi Liu; Jiang-Ming Tseng
國立中山大學	1998-04	Automatic Logic/Circuit Synthesizer Based on High-Performance and Flexible Pass-Transistor Cell Library	Shen-Fu Hsiao; Jia-Siang Yeh
國立中山大學	1998-02	VLSI Implementation of the Quadratic-Spline W-Transform for Multi-resolution Image Processing	Shen-Fu Hsiao
國立中山大學	1998-02	Design of High-Speed Low-Power 3-2 Counter and 4-2 Compressor for Fast Multipliers	Shen-Fu Hsiao;Ming-Roun Jiang;Jia-Sien Yeh
國立中山大學	1998	A Hybrid W-transform-based Coding and Its VLSI Realization for Image Compression	Shen-Fu Hsiao ; Wen-Chen Huang ; Chungnan Lee ; Cheng-Chung Hsu
國立中山大學	1997-12	Performance Studies for Selected Applications on a Network of Workstations	Chungnan Lee;Tony-yee Lee;Shen-Fu Hsiao;Tain-chi Lu
國立中山大學	1997-06	Power, Speed and Area Comparison of Several New DFT Architectures	Shen-Fu Hsiao; Chung-Yi Yen
國立中山大學	1997-06	VLSI Implementation of Digit-On-Line CORDIC with Constant Scaling Factor	Shen-Fu Hsiao; Jen-Yin Chen
國立中山大學	1997-06	VLSI Implementation of a High-Throughput CORDIC Processor for Both Angle Calculation and Vector Rotation	Shen-Fu Hsiao; Jen-Yin Chen
國立中山大學	1997-05	Efficient Implementation of Matrix Triangularization and Symmetric Matrix Tridiagonalization on Heterogeneous Workstation Clusters	Shen-Fu Hsiao; Ren-Je Shiu
國立中山大學	1997-04	New Unified VLSI Architectures for Computing DFT and Other Transforms	Shen-Fu Hsiao; Chung-Yi Yen
國立中山大學	1996-12	Efficient Eigenvalue Computation of Symmetric Tridiagonal Matrices on Heterogeneous Workstation Clusters	Shen-Fu Hsiao; Kuo-Chung Chen
國立中山大學	1996-08	Power, Delay and Area Comparison of Adders and Multipliers at Both Circuit and Architecture Levels	Shen-Fu Hsiao; Peng-Chen Wang
國立中山大學	1996-03	Parallel Singular Value Decomposition of Complex Matrices Using Multidimensional CORDIC Algorithms	Shen-Fu Hsiao;Jean-Marc Delosme
國立中山大學	1995-08	Householder CORDIC Algorithms	Shen-Fu Hsiao;Jean-Marc Delosme

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