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機構	日期	題名	作者
臺大學術典藏	2018-09-10T05:27:05Z	A 0.1-25.5-GHz differential cascaded-distributed amplifier in 0.18-μm CMOS Technology	Chihun Lee; Lan-Chou Cho; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T05:27:05Z	A low-phase-noise low-phase-error 2.4GHz CMOS quadrature VCO	Jung-Yu Chang; Chia-Hsin Wu; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T05:27:05Z	A calibrated pulse generator for impulse-radio UWB applications	Che-Fu Liang; Shih-Tsai Liu; Hsiang-Hui Chang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T05:27:05Z	A fast-switching frequency synthesizer for UWB applications	Che-Fu Liang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T05:27:05Z	A 2.5Gbps burst-mode clock and data recovery circuit	Che-Fu Liang; Sy-Chyuan Hwu; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T05:27:05Z	A dual-phase digital PWM controller for DC-DC switching converters with current balancing	Tysh-Bin Liu; Wei-Jen Huang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T05:27:04Z	A spread-spectrum clock generator using a capacitor multiplication technique	Chao-Chyun Chen; Sheng-Chou Lee; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T05:27:04Z	A 5Gbps CMOS automatic gain control amplifier for 10GBase-LX	I-Hsin Wang; Wei-Sheng Chen; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T05:27:04Z	Cycle slipping reduction technique in phase-locked loops	Chao-Chyun Chen; Sheng-Chou Lee; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T05:27:03Z	A single-path pulsewidth control loop with a built-in delay-locked loop	Sung-Rung Han; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T05:27:03Z	A wide-range multiphase delay-locked loop using mixed-mode VCDLs	Rong-Jyi Yang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T05:27:03Z	A fully integrated 1.7-3.125 Gbps clock and data recovery circuit using a gated frequency detector	Rong-Jyi Yang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T05:27:03Z	Selective metal parallel shunting inductor and its VCO application	Chia-Hsin Wu; Chun-Yi Kuo; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T05:27:03Z	CMOS differential-mode exponential voltage-to-current converters	Weihsing Liu; Shen-Iuan Liu; Shui-Ken Wei; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T05:27:03Z	A tunable bandpass DS modulator using double sampling	Chien-Hung Kuo; Chang-Hung Chen; Huang-Shih Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T04:59:19Z	An AC-coupled Quadrature LC tank VCO	Jung-Yu Chang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T04:59:17Z	A low voltage-power 13-bit 16 MSPS CMOS pipelined ADC	Ming-Huang Liu; Wei-Yang Ou; Tsung-Yi Su; Kuo-Chan Huang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T04:59:17Z	Low-voltage and low-power CMOS voltage-to-current converter	Weihsing Liu; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T04:59:17Z	Low jitter and multi-rate clock and data recovery circuit using a MSADLL for chip-to-chip interconnection	Hsiang-Hui Chang; Rong-Jyi Yang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T04:59:16Z	Low-voltage CMOS voltage-mode divider and its application	Weihsing Liu; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T04:59:16Z	Magnetic-to-digital converters using single-amplifier-based second-order delta-sigma modulators	Chien-Hung Kuo; Shr-Lung Chen; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T04:59:16Z	A Mixed-mode Synchronous Mirror Delay Insensitive to Supply and Load Variations	Chih-Hao Sun; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T04:59:16Z	Low voltage and low power CMOS exponential-control variable-gain amplifier	Weihsing Liu; Shen-Iuan Liu; Shui-Ken Wei; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T04:35:30Z	A Shifted-Averaging VCO with Precise Multiphase Outputs and Low Jitter Operation	Hsiang-Hui Chang; Shang-Ping Chen; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T04:35:29Z	A sub-1V fourth-order bandpass delta-sigma modulator	Hsiang-Hui Chang; Chien-Hung Kuo; Ming-Huang Liu; Shen-Iuan Liu; SHEN-IUAN LIU

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