臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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显示项目 61-85 / 264 (共11页)
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机构	日期	题名	作者
臺大學術典藏	2018-09-10T09:50:32Z	A 300 GHz divide-by-2 ILFD using frequency boosting technique	Pin-Hao Feng;Shen-Iuan Liu; Pin-Hao Feng; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T09:50:32Z	A 10-Gb/s adaptive parallel receiver with joint XTC and DFE using power detection	Shih-Yuan Kao;Shen-Iuan Liu; Shih-Yuan Kao; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T09:50:31Z	Divide-by-three injection-locked frequency dividers over 200 GHz in 40-nm CMOS	Pin-Hao Feng;Shen-Iuan Liu; Pin-Hao Feng; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T09:50:31Z	A 7.5-Gb/s one-tap FFE transmitter with adaptive far-end crosstalk cancellation using duty cycle detection	Shih-Yuan Kao;Shen-Iuan Liu; Shih-Yuan Kao; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T09:50:31Z	A 2.4GHz sub-harmonically injection-locked PLL with self-calibrated injection timing	SHEN-IUAN LIU; Shen-Iuan Liu; Yi-Chieh Huang; Yi-Chieh Huang;Shen-Iuan Liu
臺大學術典藏	2018-09-10T09:50:31Z	A wide-range PLL using self-healing prescaler/VCO in 65-nm CMOS	I-Ting Lee;Yun-Ta Tsai;Shen-Iuan Liu; I-Ting Lee; Yun-Ta Tsai; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T09:50:31Z	4-Gb/s parallel receivers with adaptive far-end crosstalk cancellation	Yan-Yu Lin;Shen-Iuan Liu; Yan-Yu Lin; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T09:50:31Z	A 4.8-GHz Dividerless Subharmonically Injection-Locked All-Digital PLL With a FOM of-252.5 dB	I-Ting Lee;Kai-Hui Zeng;Shen-Iuan Liu; I-Ting Lee; Kai-Hui Zeng; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T09:50:31Z	4-Gb/s parallel receivers with adaptive FEXT cancellation by pulse-width and amplitude calibrations	Yan-Yu Lin;Shen-Iuan Liu; Yan-Yu Lin; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T09:50:31Z	An all-digital spread-spectrum clock generator with self-calibrated bandwidth	I-Ting Lee;Shih-Han Ku;Shen-Iuan Liu; I-Ting Lee; Shih-Han Ku; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T09:50:31Z	A current-reused injection-locked frequency multiplication/division circuit in 40-nm CMOS	Pin-Hao Feng;Shen-Iuan Liu; Pin-Hao Feng; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T09:50:30Z	A submicrowatt 1.1-MHz CMOS relaxation oscillator with temperature compensation	Yu-Hsuan Chiang;Shen-Iuan Liu; Yu-Hsuan Chiang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T09:24:58Z	A 6.7MHz-to-1.24GHz 0.0318mm 2 fast-locking all-digital DLL in 90nm CMOS	Liang-Hsin Chen;Min-Han Hsieh;Shen-Iuan Liu;Charlie Chung-Ping Chen; Liang-Hsin Chen; Min-Han Hsieh; Shen-Iuan Liu; Charlie Chung-Ping Chen; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T09:24:58Z	A 2.4GHz sub-harmonically injection-locked PLL with self-calibrated injection timing	SHEN-IUAN LIU; Shen-Iuan Liu; Yi-Chieh Huang; Yi-Chieh Huang;Shen-Iuan Liu
臺大學術典藏	2018-09-10T09:24:58Z	A fast-locking phase-locked loop using CP control and gated VCO	I-Ting Lee;Yun-Ta Tsai;Shen-Iuan Liu; I-Ting Lee; Yun-Ta Tsai; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T09:24:58Z	A 20Gb/s adaptive duobinary transceiver	Yu-Ming Ying;I-Ting Lee;Shen-Iuan Liu; Yu-Ming Ying; I-Ting Lee; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T09:24:57Z	A 104GHz phase-locked loop using a VCO at second pole frequency	Kun-Hung Tsai;Shen-Iuan Liu; Kun-Hung Tsai; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T09:24:57Z	Inductorless wideband CMOS low-noise amplifiers using noise-canceling technique	Ke-Hou Chen;Shen-Iuan Liu; Ke-Hou Chen; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T09:24:57Z	G-Band injection-locked frequency dividers using π-type LC Network	I-Ting Lee;Shen-Iuan Liu; I-Ting Lee; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T09:24:57Z	A 3.6mW 125.7~131.86GHz divide-by-4 injection-locked frequency divider in 90nm CMOS	I-Ting Lee;Chiao-Hsing Wang;Chun-Lin Ko;Ying-Zong Juang;Shen-Iuan Liu; I-Ting Lee; Chiao-Hsing Wang; Chun-Lin Ko; Ying-Zong Juang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T09:24:57Z	An all-digital jitter-tolerance measurement technique for CDR circuits	Yi-Chieh Huang;Ping-Ying Wang;Shen-Iuan Liu; Yi-Chieh Huang; Ping-Ying Wang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T09:24:57Z	A 6GHz all-digital fractional-N frequency synthesizer using FIR-embedded noise filtering technique	I-Ting Lee;Hung-Yu Lu;Shen-Iuan Liu; I-Ting Lee; Hung-Yu Lu; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T09:24:57Z	A D-band divide-by-3 injection-locked frequency divider in 65nm CMOS	I-Ting Lee;Chiao-Hsing Wang;Ju-Rong Sha;Ying-Zong Juang;Shen-Iuan Liu; I-Ting Lee; Chiao-Hsing Wang; Ju-Rong Sha; Ying-Zong Juang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T09:24:57Z	A leakage-current-recycling phase-locked loop in 65nm CMOS technology	I-Ting Lee;Yun-Ta Tsai;Shen-Iuan Liu; I-Ting Lee; Yun-Ta Tsai; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2018-09-10T08:46:29Z	A leakage-current-recycling phase-locked loop in 65nm CMOS technology	I-Ting Lee; Yun-Ta Tsai; Shen-Iuan Liu; SHEN-IUAN LIU

显示项目 61-85 / 264 (共11页)
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