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显示项目 86-135 / 264 (共6页)
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机构 日期 题名 作者
臺大學術典藏 2018-09-10T08:46:29Z Low voltage Pipelined Analog-to-Digital Converter ?B?`?W; ¼B²`²W; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T08:46:28Z A rail-to-rail class-B buffer with DC level-shifting current mirror and distributed Miller compensation for LCD column drivers Wei-Jen Huang; Shigeisa Nagayasu; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T08:46:28Z A current-reused divide-by-3 injection-locked frequency divider in 65nm CMOS I-Ting Lee; Chiao-Hsing Wang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T08:46:28Z Decision feedback equalizers using back-gate feedback technique Chang-Lin Hsieh; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T08:46:27Z A PSRR-enhanced low-dropout regulator Wei-Jen Huang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T08:46:27Z A noise-filtering technique for fractional-N frequency synthesizers Chao-Ching Hung; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T08:46:27Z A digitally-calibrated phase-locked loop with supply sensitivity suppression Shih-Yuan Kao; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T08:46:27Z Analysis and design of D-band injection-locked frequency dividers Bo-Yu Lin; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T08:46:27Z A 40-GHz fast-locked all-digital phase-locked loop using a modified bang-bang algorithm Chao-Ching Hung; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T08:18:17Z A 35.56GHz all-digital phase-locked loop with high resolution varactors Chao-Ching Hung;Shen-Iuan Liu; Chao-Ching Hung; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T08:18:17Z A 198.9GHz ~201.0GHz injection-locked frequency divider in 65nm CMOS Bo-Yu Lin;I-Ting Lee;Chiao-Hsing Wang;Shen-Iuan Liu; Bo-Yu Lin; I-Ting Lee; Chiao-Hsing Wang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T08:18:16Z A 1.62/2.7-Gb/s adaptive transmitter with two-tap preemphasis using a propagation-time detector Shih-Yuan Kao;Shen-Iuan Liu; Shih-Yuan Kao; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T08:18:16Z A 20Gbps transmitter with adaptive pre-emphasis in 65nm CMOS technology Shih-Yuan Kao;Shen-Iuan Liu; Shih-Yuan Kao; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T08:18:16Z A phase-locked loop with background leakage current compensation Jung-Yu Chang;Shen-Iuan Liu; Jung-Yu Chang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T08:18:16Z A 258.16~259.95 GHz injection-locked frequency divider I-Ting Lee;Chiao-Hsing Wang;Bo-Yu Lin,;Shen-Iuan Liu; I-Ting Lee; Chiao-Hsing Wang; Bo-Yu Lin,; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T08:18:16Z An integrating analog-to-digital data converter with variable resolution I-Hsin Wang;Shen-Iuan Liu; I-Hsin Wang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T08:18:16Z A 1.25GHz fast-locked all-digital phase-locked loop with supply noise suppression Chao-Ching Hung;I-Fong Chen;Shen-Iuan Liu; Chao-Ching Hung; I-Fong Chen; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T08:18:15Z A merged CMOS digital near-end crosstalk canceller and analog equalizer for multi-lane serial-link receivers Jian-Hao Lu;Shen-Iuan Liu; Jian-Hao Lu; Shen-Iuan Liu; SHEN-IUAN LIU; Liu, Shen-Iuan
臺大學術典藏 2018-09-10T07:42:02Z 類比排序與中值電路 �B�`�W; ���|��; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:42:02Z 信號處理裝置 陳伯奇; 劉深淵; 曹恆偉; 吳靜雄; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:42:02Z Divide by 4/5 counter 楊清淵; 劉深淵; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:42:02Z 除4/5電路 ���M�W; �B�`�W; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:42:02Z Direct Digital Frequency Synthesizer 游宗榜; 劉深淵; 曹恆偉; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:42:01Z A 40Gb/s decision feedback equalizer using back-gate feedback technique Chang-Lin Hsieh;Shen-Iuan Liu; Chang-Lin Hsieh; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:42:01Z A 10Gb/s inductorless quarter-rate clock and data recovery circuit in 0.13um CMOS Hong-Lin Chu, Chang-Lin Hsieh;Shen-Iuan Liu; Hong-Lin Chu, Chang-Lin Hsieh; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:42:01Z A CBSC second-order sigma-delta modulator in 3μm LTPS-TFT technology Wei-Ming Lin;Chan-Fei Lin;Shen-Iuan Liu; Wei-Ming Lin; Chan-Fei Lin; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:42:01Z A delay-locked loop with digital background calibration Wei-Ming Lin;Kuang-Fu Teng;Shen-Iuan Liu; Wei-Ming Lin; Kuang-Fu Teng; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:42:01Z Loop latency reduction technique for all-digital clock and data recovery circuits I-Fong Chen;Rong-Jyi Yang;Shen-Iuan Liu; I-Fong Chen; Rong-Jyi Yang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:42:00Z A 43.7mW 96GHz phase-locked loop in 65nm CMOS technology Kun-Hung Tsai;Shen-Iuan Liu; Kun-Hung Tsai; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:42:00Z A wireless power telemetry with self-calibrated resonant frequency SHEN-IUAN LIU; Shen-Iuan Liu; Wei-Jen Huang;Chein-Lung Chen;Shen-Iuan Liu; Wei-Jen Huang; Chein-Lung Chen
臺大學術典藏 2018-09-10T07:42:00Z A frequency synthesizer for mode-1 MB-OFDM UWB applications Jung-Yu Chang;Che-Wei Fan;Shen-Iuan Liu; Jung-Yu Chang; Che-Wei Fan; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:42:00Z An all-digital clock generator for dynamic frequency scaling Wei-Ming Lin;Chao-Chyun Chen;Shen-Iuan Liu; Wei-Ming Lin; Chao-Chyun Chen; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:42:00Z A 140MS/s 10-bit Pipelined ADC with a Folded S/H Stage Hwei-Yu Lee;Shen-Iuan Liu; Hwei-Yu Lee; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:42:00Z A 132.7-to-143.5GHz injection-locked frequency divider in 65nm CMOS Bo-Yu Lin;Shen-Iuan Liu; Bo-Yu Lin; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:41:59Z High Speed CMOS Interface Circuits for IEEE-1394 High Performance Serial Bus Guang-Kaai Dehng; Jong-Woei Chen; Wei-Hung Chen; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:41:59Z A leakage-suppression technique for phase-locked systems in 65nm CMOS Chao-Ching Hung;Shen-Iuan Li; Chao-Ching Hung; Shen-Iuan Li; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:41:59Z A 128.24-to-137.00GHz injection-locked frequency divider in 65nm CMOS Bo-Yu Lin;Kun-Hung Tsai;Shen-Iuan Liu; Bo-Yu Lin; Kun-Hung Tsai; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:41:58Z A 1.5GHz all-digital spread spectrum clock generator Sheng-You Lin;Shen-Iuan Liu; Sheng-You Lin; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:41:58Z A 1.5GHz phase-locked loop with leakage current suppression in 65nm CMOS Jung-Yu Chang;Shen-Iuan Liu; Jung-Yu Chang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:41:57Z A 10Gb/s inductorless CMOS analog equalizer with interleaved active feedback topology Jian-Hao Lu;Ke-Hou Chen;Shen-Iuan Liu; Jian-Hao Lu; Ke-Hou Chen; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:41:57Z A 33.6-to-33.8Gb/s burst-mode CDR in 90nm CMOS technology Lan-Chou Cho;Chihun Lee;Chao-Ching Hung;Shen-Iuan Liu; Lan-Chou Cho; Chihun Lee; Chao-Ching Hung; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:41:57Z A fully-differential comparator-based switched-capacitor delta-sigma modulator Mu-Chen Huang;Shen-Iuan Liu; Mu-Chen Huang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:41:56Z Low-power clock-deskew buffer for high-speed digital circuits Shen-Iuan Liu; Jiunn-Hwa Lee; Hen-Wai Tsao; HEN-WAI TSAO; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:41:56Z Low-voltage BiCMOS four-quadrant multiplier and squarer Shen-Iuan Liu; Jiin-Long Lee; Cheng-Chieh Chang; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:41:56Z Low-voltage BiCMOS four-quadrant multiplier using triode-region transistors Shen-Iuan Liu; Jiin-Long Lee; Cheng-Chieh Chang; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:41:56Z Dual-input RC integrator and differentiator with tuneable time constants using current feedback amplifiers Lee, Jiin-Long; Liu, Shen-Iuan; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:41:56Z A phase-locked loop with self-calibrated charge pumps in 3µm LTPS-TFT Technology Wei-Ming Lin; Shen-Iuan Liu; Chun-Hung Kuo; Chun-Huai Li; Yao-Jen Hsieh; Chun-Ting Liu; SHEN-IUAN LIU; Wei-Ming Lin;Shen-Iuan Liu;Chun-Hung Kuo;Chun-Huai Li;Yao-Jen Hsieh;Chun-Ting Liu
臺大學術典藏 2018-09-10T07:41:56Z A single-PLL UWB frequency synthesizer using multiphase coupled ring oscillator and current-reused multiplier Jung-Yu Chang;Che-Wei Fan;Che-Fu Liang;Shen-Iuan Liu; Jung-Yu Chang; Che-Wei Fan; Che-Fu Liang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:41:55Z Analogue BiCMOS squarer and its applications Cheng-Chieh Chang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:41:55Z Spice Macro model for MAGFET and its applications Shen-Iuan Liu; Jian-Fan Wei; Guo-Ming Sung,; SHEN-IUAN LIU

显示项目 86-135 / 264 (共6页)
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