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Showing items 1-6 of 6 (1 Page(s) Totally)
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| 國立交通大學 |
2017-04-21T06:50:05Z |
Accelerating Dynamic Peak Power Analysis Using An Essential-Signal-Based Methodology
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Shih, Che-Hua; Yen, Chia-Chih; Lin, Shen-Tien; Lin, Hermes; Jou, Jing-Yang |
| 國立交通大學 |
2014-12-12T01:21:42Z |
利用延伸式有限狀態機來實現介面規格相符驗證之研究
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石哲華; Shih, Che-Hua; 周景揚; Jou, Jing-Yang |
| 國立交通大學 |
2014-12-08T15:48:25Z |
FSM-Based Formal Compliance Verification of Interface Protocols
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Shih, Che-Hua; Yang, Ya-Ching; Yen, Chia-Chih; Huang, Juinn-Dar; Jou, Jing-Yang |
| 國立交通大學 |
2014-12-08T15:24:37Z |
FSM-based transaction-level functional coverage for interface compliance verification
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Su, Man-Yun; Shih, Che-Hua; Huang, Juinn-Dar; Jou, Jing-Yang |
| 國立交通大學 |
2014-12-08T15:21:18Z |
Equivalence Checking of Scheduling with Speculative Code Transformations in High-Level Synthesis
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Lee, Chi-Hui; Shih, Che-Hua; Huang, Juinn-Dar; Jou, Jing-Yang |
| 國立交通大學 |
2014-12-08T15:09:35Z |
Automatic Verification Stimulus Generation for Interface Protocols Modeled With Non-Deterministic Extended FSM
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Shih, Che-Hua; Huang, Juinn-Dar; Jon, Jing-Yang |
Showing items 1-6 of 6 (1 Page(s) Totally)
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