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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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"shih timothy k"的相關文件
顯示項目 461-479 / 479 (共10頁) << < 1 2 3 4 5 6 7 8 9 10 每頁顯示[10|25|50]項目
| 淡江大學 |
1995 |
Multimedia presentation designs with database support
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施國琛; Shih, Timothy K.; Kuo, Chin-hwa; An, Kuan-shen |
| 淡江大學 |
1995 |
Visualization of well engineered logic specification programs
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施國琛; Shih, Timothy K.; Kuo, Chin-hwa; Yu, Wen-Shan |
| 淡江大學 |
1995 |
An operational semantics approach to disciplined exceptions in logic programming
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施國琛; Shih, Timothy K.; Lin, F. |
| 淡江大學 |
1995 |
Formal specification and verification in Z for syncchronous concurrent compution
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Lin, Fuyau;施國琛; Shih, Timothy K. |
| 淡江大學 |
1994-12 |
Continuation semantics of logic programs with disciplined exception handling
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施國琛; Shih, Timothy K. |
| 淡江大學 |
1994-12 |
Spec: A Specification Processing Environment with Controls
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施國琛; Shih, Timothy K.; Davis, Ruth E. |
| 淡江大學 |
1994-09 |
A Temporal Arithmetic Based Reasoning System for Systolic Array Designs
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施國琛; Shih, Timothy K.; Ling, Nam |
| 淡江大學 |
1994 |
Formalizing the design of systolic array designs
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施國琛; Shih, Timothy K. |
| 淡江大學 |
1993-08 |
VSTA : a prolog-based formal verifier for systolic array designs
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Ling, Nam; 施國琛; Shih, Timothy K. |
| 淡江大學 |
1993-08 |
The use of fixed point induction in verifying systolic array designs : An applicative approach
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施國琛; Shih, Timothy K. |
| 淡江大學 |
1993-01 |
Verification of systolic architecture designs
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施國琛 ; Shih, Timothy K. |
| 淡江大學 |
1992-10 |
The specification and verification of synchronous concurrent computation
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Lin, F.; 施國琛; Shih, Timothy K.; Lin, H. ; Wang, H. |
| 淡江大學 |
1992-01 |
Coping with failure : disciplined exception handling in logic programming
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施國琛; Shih, Timothy K. |
| 淡江大學 |
1992-01 |
Inductive techniques for formal verification of systolic array designs in DSP applications approach
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施國琛; Shih, Timothy K. |
| 淡江大學 |
1992-01 |
Intelligence backstracking and controls based on a deduction status representation in logic programming
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施國琛; Shih, Timothy K. |
| 淡江大學 |
1992-01 |
Program generation and controls in a specification processing environment
|
施國琛; Shih, Timothy K. |
| 淡江大學 |
1992-01 |
Using prolog as a tool for systolic array designs
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施國琛; Shih, Timothy K. |
| 淡江大學 |
1992-01 |
A temporal rule-based expert system for systolic array designs
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施國琛; Shih, timothy K. |
| 淡江大學 |
1991-11 |
An automatic design specification and verification tool for systolic array designe
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Lin, Fu-yau; 施國琛; Shih, Timothy K.; Ling, Nam |
顯示項目 461-479 / 479 (共10頁) << < 1 2 3 4 5 6 7 8 9 10 每頁顯示[10|25|50]項目
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