臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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Showing items 36-45 of 58 (6 Page(s) Totally)
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Institution	Date	Title	Author
臺大學術典藏	2018-09-10T08:19:09Z	A 300- to 800-MHz De-Skew Clock Generator for Arbitrary Delay	Y-C Hung;K Fong;T-C Lee; Y-C Hung; K Fong; T-C Lee; TAI-CHENG LEE
臺大學術典藏	2018-09-10T08:19:08Z	A 320-MHz CMOS Continuous-Time ΔΣ Modulator With 5-MHz Signal Bandwidth and 8.3-bit ENOB	K-T Chen;T-C Lee; K-T Chen; T-C Lee; TAI-CHENG LEE
臺大學術典藏	2018-09-10T07:09:31Z	A Fully Integrated 36MHz to 230MHz Multiplying DLL with Adaptive Current Tuning	K-J Hsiao; T-C Lee; TAI-CHENG LEE
臺大學術典藏	2018-09-10T06:37:54Z	A Fully Integrated 36MHz to 230MHz Multiplying DLL with Adaptive Current Tuning	K-J Hsiao; T-C Lee; TAI-CHENG LEE
臺大學術典藏	2018-09-10T06:37:53Z	A Delay-Line-Based GFSK Demodulator for Low-IF Receivers	H-S Kao; M-J Yang; T-C Lee; TAI-CHENG LEE
臺大學術典藏	2018-09-10T06:03:18Z	A Spur-Suppression Technique for Phase-Locked Frequency Synthesizers	W.-L. Lee; TAI-CHENG LEE; T.-C. Lee
臺大學術典藏	2018-09-10T06:03:17Z	A Mixed-Signal GFSK Demodulator for Bluetooth	T.-C. Lee; C.-C. Chen; TAI-CHENG LEE
臺大學術典藏	2018-09-10T06:03:17Z	The design and analysis of a Miller Divider Based Clock Generator for MBOA-UWB Application	T.-C. Lee; Y.-C. Huang; TAI-CHENG LEE
臺大學術典藏	2018-09-10T06:03:17Z	The design and analysis of a DLL-Based Frequency Synthesizer for UWB Application	T.-C. Lee; K.-J. Hsiao; TAI-CHENG LEE
臺大學術典藏	2018-09-10T05:29:20Z	A Linear-Approximation Technique for Digitally-Calibrated Pipelined ADCs	D. L. Shen; T. C. Lee; TAI-CHENG LEE

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