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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
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2019臺灣學術機構典藏
研討會
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Showing items 106-115 of 202  (21 Page(s) Totally)
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Institution Date Title Author
臺大學術典藏 2018-09-10T08:18:39Z Noise coupling mitigation in PWR/GND plane pair by means of photonic crystal fence: sensitivity analysis and design parameters extraction A. Ciccomancini;T. L. Wu;A. Orl;i; A. Ciccomancini; T. L. Wu; A. Orl; i; TZONG-LIN WU
臺大學術典藏 2018-09-10T08:18:39Z Design and modelling of miniaturized bandgap structure for wideband GHz-noise suppression based on LTCC technology W.-Y. Huang;T.-K. Wang;T.-L. Wu; W.-Y. Huang; T.-K. Wang; T.-L. Wu; TZONG-LIN WU
臺大學術典藏 2018-09-10T07:42:27Z Signal/power integrity design strategy for low-cost package of high-speed memory I/O interfaces H.-H. Chuang;C.-J. Hsu;M.-Z. Hong;D. Hsu;R. Huang;L.-C. Hsiao;T.-L. Wu; H.-H. Chuang; C.-J. Hsu; M.-Z. Hong; D. Hsu; R. Huang; L.-C. Hsiao; T.-L. Wu; TZONG-LIN WU
臺大學術典藏 2018-09-10T07:42:26Z Rigorous analysis of polarization effect of wavelength-flattened fused fiber-optic couplers T.-L. Wu; H.-C. Chang; TZONG-LIN WU
臺大學術典藏 2018-09-10T07:42:26Z Bypass capacitance effect both on the signal integrity and electromagnetic radiation for high-speed clock circuits TZONG-LIN WU; S.-C. Chao; T.-L. Wu
臺大學術典藏 2018-09-10T07:42:26Z A metamaterial-typed differential transmission line with broadband common-mode suppression C.-H. Tsai;T.-L. Wu; C.-H. Tsai; T.-L. Wu; TZONG-LIN WU
臺大學術典藏 2018-09-10T07:42:26Z A GHz common-mode filter using negative permittivity metamaterial on low temperature co-fire ceramic (LTCC) substrate C.-H. Tsai;T.-L. Wu; C.-H. Tsai; T.-L. Wu; TZONG-LIN WU
臺大學術典藏 2018-09-10T07:42:25Z Vectorial analysis for polarization effect of wavelength-flattened fiber-optic couplers T.-L. Wu; TZONG-LIN WU
臺大學術典藏 2018-09-10T07:42:25Z Design and modeling of a stopband-enhanced EBG structure using ground surface perturbation lattice for power/ground noise suppression T.-K. Wang;C.-Y. Hsieh;H.-H. Chuang;T. L. Wu; T.-K. Wang; C.-Y. Hsieh; H.-H. Chuang; T. L. Wu; TZONG-LIN WU
臺大學術典藏 2018-09-10T07:08:57Z Power integrity chip-package-PCB co-Simulation for I/O interface of DDR3 high-speed memory H.-H. Chuang; S.-J. Wu; M.-Z. Hong; D. Hsu; R. Huang; T.-L. Wu; TZONG-LIN WU; H.-H. Chuang;S.-J. Wu;M.-Z. Hong;D. Hsu;R. Huang;T.-L. Wu

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