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"tsai fu yi"的相關文件
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| 國立交通大學 |
2017-04-21T06:49:33Z |
On the Design of Power-Rail ESD Clamp Circuit with Consideration of Gate Leakage Current in 65-nm Low-Voltage CMOS Process
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Ker, Ming-Dou; Chiu, Po-Yen; Tsai, Fu-Yi; Chang, Yeong-Jar |
| 國立交通大學 |
2014-12-08T15:36:36Z |
Electrooptical Properties of InGaAs/GaAs Strained Single Quantum Wells
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Lu, Chien-Rong; Lou, Shry-Fong; Cheng, Hung-Hsiang; Lee, Chien-Ping; Tsai, Fu-Yi |
| 國立交通大學 |
2014-12-08T15:28:41Z |
Failure Analysis on Gate-Driven ESD Clamp Circuit after TLP Stresses of Different Voltage Steps in a 16-V CMOS Process
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Dai, Chia-Tsen; Chiu, Po-Yen; Ker, Ming-Dou; Tsai, Fu-Yi; Peng, Yan-Hua; Tsai, Chia-Ku |
| 國立交通大學 |
2014-12-08T15:25:20Z |
Ultra-Low-Leakage Power-Rail ESD Clamp Circuit in Nanoscale Low-Voltage CMOS Process
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Chiu, Po-Yen; Ker, Ming-Dou; Tsai, Fu-Yi; Chang, Yeong-Jar |
| 臺北醫學大學 |
2011 |
Effect of collagen on the mechanical properties of hydroxyapatite coatings
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Ou, Keng-Liang;Chungc, Ren-Jei;Tsai, Fu-Yi;Liang, Pei-Yu;Huang, Shih-Wei;Chang, Shou-Yi |
| 義守大學 |
2009 |
Ultra-low-leakage power-rail ESD clamp circuit in nanoscale low-voltage CMOS process
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Chiu, Po-Yen ; Ker, Ming-Dou ; Tsai, Fu-Yi ; Chang, Yeong-Jar |
| 義守大學 |
2009 |
On the design of power-rail ESD clamp circuit with consideration of gate leakage current in 65-nm low-voltage CMOS process
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Ker, Ming-Dou ; Chiu, Po-Yen ; Tsai, Fu-Yi ; Chang, Yeong-Jar |
| 國立成功大學 |
2001 |
InGaAs/GaAs quantum wells and quantum dots on (111)B orientation
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Tyan, Shing-Long; Lin, Yun-Ging; Tsai, Fu-Yi; Lee, Chien-Ping; Shields, Philip A.; Nicholas, Robin J. |
| 國立成功大學 |
2000-06 |
Magneto-photoluminescence study of InGaAs/GaAs quantum wells and quantum dots grown on (111)B GaAs substrate
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Tyan, Shing-Long; Shields, Philip A.; Nicholas, Robin J.; Tsai, Fu-Yi; Lee, Chien-Ping |
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