臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

	English \| 正體中文 \| 简体中文 \| Total items :0
	Visitors : 50717674 Online Users : 428 Project Commissioned by the Ministry of Education Project Executed by National Taiwan University Library

Scope

Adv. Search

Login

Administrator

臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

About TAIR
	About TAIR

Browse By
	Institution
	Author
	Title
	Date
	Statistics Chart
	Institution Facts
	Trend

News
	2019臺灣學術機構典藏研討會
	機構典藏系統RC7版本已發佈

Copyright
	Publisher & Journal Policy
	TAIR Copyright Conference Minutes

Related Links
	機構典藏計畫網站
	ROAR
	OpenDOAR
	SHERPA
	OAIster
	JAIRO
	Ira
	DSPACE
	RWWR
	臺大學術典藏NTU Scholars

"vijaykrishnan narayanan"

Return to Browse by Author
Sorting by Title	Sort by Date

Showing items 1-12 of 12 (1 Page(s) Totally)
1
View [10|25|50] records per page

Institution	Date	Title	Author
元智大學	Sep-16	Area-aware Decomposition for Single-Electron Transistor Arrays	陳勇志; Ching-Hsuan Ho; Chun-Yao Wang; Ching-Yi Huang; Suma Datta; Vijaykrishnan Narayanan
元智大學	Jun-16	Diagnosis and Synthesis for Defective Reconfigurable Single-Electron Transistor Arrays	陳勇志; Ching-Yi Huang; Yun-Jui Li; Chian-Wei Liu; Chun-Yao Wang; Suman Datta; Vijaykrishnan Narayanan
元智大學	Jun-16	Diagnosis and Synthesis for Defective Reconfigurable Single-Electron Transistor Arrays	陳勇志; Ching-Yi Huang; Yun-Jui Li; Chian-Wei Liu; Chun-Yao Wang; Suman Datta; Vijaykrishnan Narayanan
元智大學	Dec-15	Synthesis for Width Minimization in the Single-Electron Transistor Array	陳勇志; Chian-Wei Liu; Chang-En Chiang; Ching-Yi Huang; Chun-Yao Wang; Suman Datta; Vijaykrishnan Narayanan
元智大學	Dec-15	Synthesis for Width Minimization in the Single-Electron Transistor Array	陳勇志; Chian-Wei Liu; Chang-En Chiang; Ching-Yi Huang; Chun-Yao Wang; Suman Datta; Vijaykrishnan Narayanan
元智大學	Apr-17	Dynamic Diagnosis for Defective Reconfigurable Single-Electron Transistor Arrays	陳勇志; Yun-Jui Li; Ching-Yi Huang; Chia-Cheng Wu; Chun-Yao Wang; Suman Datta; Vijaykrishnan Narayanan
元智大學	2015-01-19	A Defect-aware Approach for Mapping Reconfigurable Single-Electron Transistor Arrays	陳勇志; Ching-Yi Huang; Chian-Wei Liu; Chun-Yao Wang; Suman Datta; Vijaykrishnan Narayanan
元智大學	2015-01-19	A Defect-aware Approach for Mapping Reconfigurable Single-Electron Transistor Arrays	陳勇志; Ching-Yi Huang; Chian-Wei Liu; Chun-Yao Wang; Suman Datta; Vijaykrishnan Narayanan
元智大學	2014-03-24	Width Minimization in the Single-Electron Transistor Array Synthesis	陳勇志; Chian-Wei Liu; Chang-En Chiang; Ching-Yi Huang; Chun-Yao Wang; Suman Datta; Vijaykrishnan Narayanan
元智大學	2013-03-18	On Reconfigurable Single-Electron Transistor Arrays Synthesis Using Reordering Techniques	陳勇志; Chang-En Chiang; Li-Fu Tang; Chun-Yao Wang; Ching-Yi Huang; Suman Datta; Vijaykrishnan Narayanan
元智大學	2013-03-18	On Reconfigurable Single-Electron Transistor Arrays Synthesis Using Reordering Techniques	陳勇志; Chang-En Chiang; Li-Fu Tang; Chun-Yao Wang; Ching-Yi Huang; Suman Datta; Vijaykrishnan Narayanan
元智大學	2013-02	A Synthesis Algorithm for Reconfigurable Single-Electron Transistor Arrays	陳勇志; SOUMYA EACHEMPATI; CHUN-YAO WANG; SUMAN DATTA; YUAN XIE; VIJAYKRISHNAN NARAYANAN

Showing items 1-12 of 12 (1 Page(s) Totally)
1
View [10|25|50] records per page