臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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Institution	Date	Title	Author
臺大學術典藏	2018-09-10T08:18:40Z	Signal/Power integrity modeling of high-speed memory modules using chip-package-board co-analysis	W.-D. Guo; Y.-H. Lin; H.-S. Chen; Y-C Lu; J. Hong; C.-H. Yu; A. Cheng; J. Chou; C.-J. Chang; J. Ku; T.-L. Wu; R.-B. Wu; H.-H. Chuang; YI-CHANG LU; TZONG-LIN WU; HSIN-SHU CHEN; RUEY-BEEI WU et al.
臺大學術典藏	2018-09-10T08:17:53Z	Enhanced microstrip guard trace for ringing noise suppression using a dielectric superstrate	Y.-S. Cheng;W.-D. Guo;C.-P. Hung;R.-B. Wu;D. De Zutter; Y.-S. Cheng; W.-D. Guo; C.-P. Hung; R.-B. Wu; D. De Zutter; RUEY-BEEI WU
臺大學術典藏	2018-09-10T08:17:53Z	Enhanced microstrip guard trace for ringing noise suppression using a dielectric superstrate	Y.-S. Cheng;W.-D. Guo;C.-P. Hung;R.-B. Wu;D. De Zutter; Y.-S. Cheng; W.-D. Guo; C.-P. Hung; R.-B. Wu; D. De Zutter; RUEY-BEEI WU
臺大學術典藏	2018-09-10T08:17:53Z	Guard trace design for improvement on transient waveforms and eye diagrams of serpentine delay lines	G.-H. Shiue;C.-Y. Chao;W.-D. Guo;R.-B. Wu; G.-H. Shiue; C.-Y. Chao; W.-D. Guo; R.-B. Wu; RUEY-BEEI WU
臺大學術典藏	2018-09-10T08:17:53Z	Guard trace design for improvement on transient waveforms and eye diagrams of serpentine delay lines	G.-H. Shiue;C.-Y. Chao;W.-D. Guo;R.-B. Wu; G.-H. Shiue; C.-Y. Chao; W.-D. Guo; R.-B. Wu; RUEY-BEEI WU
臺大學術典藏	2018-09-10T07:41:19Z	Fast methodology for determining eye-diagram characteristics of lossy transmission lines	W.-D. Guo;J.-H. Lin;C.-M. Lin;T.-W. Huang;R.-B. Wu; W.-D. Guo; J.-H. Lin; C.-M. Lin; T.-W. Huang; R.-B. Wu; RUEY-BEEI WU
臺大學術典藏	2018-09-10T07:41:19Z	Fast methodology for determining eye-diagram characteristics of lossy transmission lines	W.-D. Guo;J.-H. Lin;C.-M. Lin;T.-W. Huang;R.-B. Wu; W.-D. Guo; J.-H. Lin; C.-M. Lin; T.-W. Huang; R.-B. Wu; RUEY-BEEI WU
臺大學術典藏	2018-09-10T07:08:06Z	Signal integrity analysis of DDR3 high-speed memory module	C.-K. Chen;W.-D. Guo;C.-H. Yu;R.-B. Wu; C.-K. Chen; W.-D. Guo; C.-H. Yu; R.-B. Wu; RUEY-BEEI WU
臺大學術典藏	2018-09-10T07:08:06Z	Signal integrity analysis of DDR3 high-speed memory module	C.-K. Chen;W.-D. Guo;C.-H. Yu;R.-B. Wu; C.-K. Chen; W.-D. Guo; C.-H. Yu; R.-B. Wu; RUEY-BEEI WU
臺大學術典藏	2018-09-10T07:08:05Z	Fewest vias design for microstrip guard trace by using overlying dielectric	Y.-S. Cheng; W.-D. Guo; G.-H.Shiue; H.-H. Cheng; C.-C. Wang; R.-B. Wu; RUEY-BEEI WU

Showing items 1-10 of 21 (3 Page(s) Totally)
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