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Institution Date Title Author
臺大學術典藏 2018-09-10T08:19:11Z A 5-GHz Relative-Phase Cancellation Fractional-N Phase-Locked Loops in 0.13-μm CMOS W.-H. Chiu;C.-Y. Cheng;T.-H. Lin; W.-H. Chiu; C.-Y. Cheng; T.-H. Lin; TSUNG-HSIEN LIN
臺大學術典藏 2018-09-10T07:43:10Z A 5GHz Phase-Locked Loop Using Dynamic Phase-Error Compensation Technique for Fast Settling in 0.18-μm CMOS W.-H. Chiu;Y.-H. Huang;T.-H. Lin; W.-H. Chiu; Y.-H. Huang; T.-H. Lin; TSUNG-HSIEN LIN
臺大學術典藏 2018-09-10T07:43:10Z A Time-Domain-Based Self-Calibrated Analog-to-Digital Converter With A Linear Voltage-to-Delay Circuit in 0.18-μm CMOS C.-H. Yang;W.-H. Chiu;T.-H. Lin; C.-H. Yang; W.-H. Chiu; T.-H. Lin; TSUNG-HSIEN LIN
臺大學術典藏 2018-09-10T07:43:10Z A charge pump current missmatch calibration technique for ΔΣ fractional-N PLLs in 0.18-μm CMOS W.-H. Chiu;T.-S. Chang;T.-H. Lin; W.-H. Chiu; T.-S. Chang; T.-H. Lin; TSUNG-HSIEN LIN
臺大學術典藏 2018-09-10T07:43:10Z A 400-MHz/900-MHz/2.4-GHz Multi-band FSK Transmitter in 0.18-μm CMOS K.-C. Liao;P.-S. Huang;W.-H. Chiu;T.-H. Lin; K.-C. Liao; P.-S. Huang; W.-H. Chiu; T.-H. Lin; TSUNG-HSIEN LIN
臺大學術典藏 2018-09-10T06:37:56Z A Wide-Range Synchronous 50% Duty-Cycle Clock Generator W.-H. Chiu; T.-H. Lin; TSUNG-HSIEN LIN
臺大學術典藏 2018-09-10T06:37:56Z A 5.5-GHz 16-mW fast-locking frequency synthesizer in 0.18-μm CMOS W.-H. Chiu; T.-S. Chan; T.-H. Lin; TSUNG-HSIEN LIN
臺大學術典藏 2018-09-10T06:03:12Z New Optimal Rate-Diversity Tradeoff Space-Time Codes with Adaptive Iterative Decoding W.-H. Chiu; H.-J. Su; HSUAN-JUNG SU
國立高雄師範大學 2013-08 Biodegradation of carbamate pesticides by natural river biofilms in different seasons and their effects on biofilm community structure Chien-Jung Tien;M. C. Lin;W. H. Chiu;C. S. Chen; 陳士賢;田倩蓉

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