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Institution Date Title Author
臺大學術典藏 2020-05-04T07:27:47Z SECRET: Selective error correction for refresh energy reduction in DRAMs. Chen, Yi-Jung; Yang, Chia-Lin; Wang, Cheng-Yuan Michael; CHIA-LIN YANG; Shen, De-Yu; Lin, Chung-Hsiang; Lin, Chung-Hsiang;Shen, De-Yu;Chen, Yi-Jung;Yang, Chia-Lin;Wang, Cheng-Yuan Michael
臺大學術典藏 2020-05-04T07:27:45Z A buffer cache architecture for smartphones with hybrid DRAM/PCM memory. CHIA-LIN YANG; Wang, Cheng-Yuan Michael; Li, Hsiang-Pang; Yang, Chia-Lin; Lin, Ye-Jyun; Lin, Ye-Jyun;Yang, Chia-Lin;Li, Hsiang-Pang;Wang, Cheng-Yuan Michael
臺大學術典藏 2020-05-04T07:27:45Z NVM duet: unified working memory and persistent store architecture. Liu, Ren-Shuo;Shen, De-Yu;Yang, Chia-Lin;Yu, Shun-Chih;Wang, Cheng-Yuan Michael; Liu, Ren-Shuo; Shen, De-Yu; Yang, Chia-Lin; Yu, Shun-Chih; Wang, Cheng-Yuan Michael; CHIA-LIN YANG
臺大學術典藏 2020-05-04T07:27:42Z NVM Duet: Unified Working Memory and Persistent Store Architecture Liu, Ren-Shuo;Shen, De-Yu;Yang, Chia-Lin;Yu, Shun-Chih;Wang, Cheng-Yuan Michael; Liu, Ren-Shuo; Shen, De-Yu; Yang, Chia-Lin; Yu, Shun-Chih; Wang, Cheng-Yuan Michael; CHIA-LIN YANG
國立交通大學 2016-03-28T00:05:45Z A 45nm 6b/cell Charge-Trapping Flash Memory Using LDPC-Based ECC and Drift-Immune Soft-Sensing Engine Ho, Kin-Chu; Fang, Po-Chao; Li, Hsiang-Pang; Wang, Cheng-Yuan Michael; Chang, Hsie-Chia
臺大學術典藏 2012 Age-based PCM wear leveling with nearly zero search cost. CHIA-LIN YANG; Wang, Cheng-Yuan Michael; Chen, Chi-Hao; Hsiu, Pi-Cheng; Kuo, Tei-Wei; Yang, Chia-Lin
臺大學術典藏 2012 Age-based PCM wear leveling with nearly zero search cost. Chen, Chi-Hao; Hsiu, Pi-Cheng; Kuo, Tei-Wei; Yang, Chia-Lin; Wang, Cheng-Yuan Michael; TEI-WEI KUO

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