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Showing items 16-25 of 50  (5 Page(s) Totally)
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Institution Date Title Author
國立臺灣大學 2004-08 A 1.8V 2.5-5.2 GHz CMOS dual-input two-stage ring VCO Tu, Wei-Hsuan; Yeh, Jyh-Yih; Tsai, Hung-Chieh; Wang, Chorng-Kuang
國立臺灣大學 2004-08 A 3.1-10.6 GHz CMOS cascaded two-stage distributed amplifier for ultra-wideband application Chen, Kuan-Hung; Wang, Chorng-Kuang
國立臺灣大學 2004-08 A dual-band IEEE 802.11a/b/g receiver front-end using half-IF and dual-conversion Hou, Chun-Chih; Chang, Ching-Chi; Wang, Chorng-Kuang
國立臺灣大學 2004-08 A hardware efficient 64-QAM low-IF transceiver baseband for broadband communications Chang, Ching-Chi; Shiue, Muh-Tian; Wang, Chorng-Kuang
臺大學術典藏 2004-08 A 14 GHz DLL based low-jitter multi-phase clock generator for low-band ultra-wideband application Liu, Tsung-Te; Wang, Chorng-Kuang; Liu, Tsung-Te; Wang, Chorng-Kuang
國立臺灣大學 2004-05 A 10 Gbase-LX4 receiver front end transimpedance amplifier and limiting amplifier Tsai, Hung-Chieh; Yeh, Jyh-Yih; Tu, Wei-Hsuan; Lee, Tai-Cheng; Wang, Chorng-Kuang
臺大學術典藏 2004-05 A 10 Gbase-LX4 receiver front end transimpedance amplifier and limiting amplifier Tsai, Hung-Chieh; Yeh, Jyh-Yih; Tu, Wei-Hsuan; Lee, Tai-Cheng; Wang, Chorng-Kuang; Tsai, Hung-Chieh; Yeh, Jyh-Yih; Tu, Wei-Hsuan; Lee, Tai-Cheng; Wang, Chorng-Kuang
國立臺灣大學 2002-08 A VLSI architecture of DMT based transceiver for VDSL system Chang, Ching-Chi; Shieu, Muh-Tian; Wang, Chorng-Kuang
國立臺灣大學 2002-08 All digital CDMA upstream transmitter and baseband VLSI design of head-end receiver for upstream cable networks Su, Keng-Yi; Shieu, Muh-Tain; Wang, Chorng-Kuang
國立臺灣大學 2002-08 A programmable filter with self-tuning for DMT VDSL receiver Chou, Chia-Hua; Lin, Chien-Chih; Wang, Chorng-Kuang

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