| 國立臺灣大學 |
2012 |
A Fully Integrated Hepatitis B Virus DNA Detection SoC based on Monolithic Polysilicon Nanowire CMOS Process
|
Huang, Che-Wei; Huang, Yu-Jie; Yen, Pei-Wen; Hsueh, Hsiao-Ting; Lin, Chia-Yi; Chen, Min-Cheng; Ho, ChiaHua; Yang, Fu-Liang; Tsai, Hann-Huei; Liao, Hsin-Hao; Juang, Ying-Zong; Wang, Chorng-Kuang; Lin, Chih-Ting; Lu, Shey-Shi |
| 國立臺灣大學 |
2011 |
A fully-integrated cantilever based DNA detection SoC in a CMOS Bio-MEMS Process
|
Huang, Yu-Jie; Huang, Che-Wei; Lin, Tsung-Hsien; Lin, Chih-Ting; Chen, Li-Guang; Hsiao, Po-Yun; Wu, Bi-Ru; Hsueh, Hsiao-Ting; Kuo, Bing-Jye; Tsai, Hann-Huei; Liao, Hsin-Hao; Juang, Ying-Zong; Wang, Chorng-Kuang; Lu, Shey-Shi |
| 國立臺灣大學 |
2009 |
A 60-GHz phased array receiver front-end in 0.13-?m CMOS technology
|
Wang, Chao-Shiun; Huang, Juin-Wei; Chu, Kun-Da; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2006-01 |
PLL Circuits, The VLSI Handbook
|
Yuan, Min-shueh; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2005-06 |
Subharmonic direct frequency synthesizer for mode-1 MB-OFDM UWB system
|
Lin, Chien-Chih; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2005-05 |
High speed pilot-less sampling frequency acquisition for DMT systems
|
Chang, Ching-Chi; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2005-05 |
A multi-band multi-standard RF front-end IEEE 802.16a for IEEE 802.16a and IEEE 802.11 a/b/g applications
|
Wang, Chao-Shiun; Li, Wei-Chang; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2005-05 |
Digital VLSI OFDM transceiver architecture for wireless SoC design
|
Tseng, Wei-Hsiang; Chang, Ching-Chi; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2005-05 |
A 15mW 69dB 2 Gsamples/s CMOS analog front-end for low-band UWB applications
|
Lee, Hua-Chin; Lin, Chien-Chih; Wu, Chia-Hsin; Liu, Shen-Iuan; Wang, Chorng-Kuang; Tsao, Hen-Wai |
| 臺大學術典藏 |
2005-05 |
A multi-band multi-standard RF front-end IEEE 802.16a for IEEE 802.16a and IEEE 802.11 a/b/g applications
|
Wang, Chao-Shiun; Li, Wei-Chang; Wang, Chorng-Kuang; Wang, Chao-Shiun; Li, Wei-Chang; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2005-02 |
A regenerative semi-dynamic frequency divider for mode-1 MB-OFDM UWB hopping carrier generation
|
Lin, Chien-chih; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2004-12 |
A variable-length DHT-based FFT/IFFT processor for VDSL/ADSL systems
|
Pao, Tsung-Chieh; Chang, Ching-Chi; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2004-09 |
A 0.8-8 GHz 9.7 mW analog-digital dual-loop adaptive-bandwidth DLL based multi-phase clock generator
|
Liu, Tsung-Te; Wang, Chorng-Kuang |
| 臺大學術典藏 |
2004-09 |
A 0.8-8 GHz 9.7 mW analog-digital dual-loop adaptive-bandwidth DLL based multi-phase clock generator
|
Liu, Tsung-Te; Wang, Chorng-Kuang; Liu, Tsung-Te; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2004-08 |
A 14 GHz DLL based low-jitter multi-phase clock generator for low-band ultra-wideband application
|
Liu, Tsung-Te; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2004-08 |
A 1.8V 2.5-5.2 GHz CMOS dual-input two-stage ring VCO
|
Tu, Wei-Hsuan; Yeh, Jyh-Yih; Tsai, Hung-Chieh; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2004-08 |
A 3.1-10.6 GHz CMOS cascaded two-stage distributed amplifier for ultra-wideband application
|
Chen, Kuan-Hung; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2004-08 |
A dual-band IEEE 802.11a/b/g receiver front-end using half-IF and dual-conversion
|
Hou, Chun-Chih; Chang, Ching-Chi; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2004-08 |
A hardware efficient 64-QAM low-IF transceiver baseband for broadband communications
|
Chang, Ching-Chi; Shiue, Muh-Tian; Wang, Chorng-Kuang |
| 臺大學術典藏 |
2004-08 |
A 14 GHz DLL based low-jitter multi-phase clock generator for low-band ultra-wideband application
|
Liu, Tsung-Te; Wang, Chorng-Kuang; Liu, Tsung-Te; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2004-05 |
A 10 Gbase-LX4 receiver front end transimpedance amplifier and limiting amplifier
|
Tsai, Hung-Chieh; Yeh, Jyh-Yih; Tu, Wei-Hsuan; Lee, Tai-Cheng; Wang, Chorng-Kuang |
| 臺大學術典藏 |
2004-05 |
A 10 Gbase-LX4 receiver front end transimpedance amplifier and limiting amplifier
|
Tsai, Hung-Chieh; Yeh, Jyh-Yih; Tu, Wei-Hsuan; Lee, Tai-Cheng; Wang, Chorng-Kuang; Tsai, Hung-Chieh; Yeh, Jyh-Yih; Tu, Wei-Hsuan; Lee, Tai-Cheng; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2002-08 |
A VLSI architecture of DMT based transceiver for VDSL system
|
Chang, Ching-Chi; Shieu, Muh-Tian; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2002-08 |
All digital CDMA upstream transmitter and baseband VLSI design of head-end receiver for upstream cable networks
|
Su, Keng-Yi; Shieu, Muh-Tain; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2002-08 |
A programmable filter with self-tuning for DMT VDSL receiver
|
Chou, Chia-Hua; Lin, Chien-Chih; Wang, Chorng-Kuang |
