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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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"wang chorng kuang"的相關文件
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| 國立臺灣大學 |
2005-05 |
High speed pilot-less sampling frequency acquisition for DMT systems
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Chang, Ching-Chi; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2005-05 |
A multi-band multi-standard RF front-end IEEE 802.16a for IEEE 802.16a and IEEE 802.11 a/b/g applications
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Wang, Chao-Shiun; Li, Wei-Chang; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2005-05 |
Digital VLSI OFDM transceiver architecture for wireless SoC design
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Tseng, Wei-Hsiang; Chang, Ching-Chi; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2005-05 |
A 15mW 69dB 2 Gsamples/s CMOS analog front-end for low-band UWB applications
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Lee, Hua-Chin; Lin, Chien-Chih; Wu, Chia-Hsin; Liu, Shen-Iuan; Wang, Chorng-Kuang; Tsao, Hen-Wai |
| 臺大學術典藏 |
2005-05 |
A multi-band multi-standard RF front-end IEEE 802.16a for IEEE 802.16a and IEEE 802.11 a/b/g applications
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Wang, Chao-Shiun; Li, Wei-Chang; Wang, Chorng-Kuang; Wang, Chao-Shiun; Li, Wei-Chang; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2005-02 |
A regenerative semi-dynamic frequency divider for mode-1 MB-OFDM UWB hopping carrier generation
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Lin, Chien-chih; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2004-12 |
A variable-length DHT-based FFT/IFFT processor for VDSL/ADSL systems
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Pao, Tsung-Chieh; Chang, Ching-Chi; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2004-09 |
A 0.8-8 GHz 9.7 mW analog-digital dual-loop adaptive-bandwidth DLL based multi-phase clock generator
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Liu, Tsung-Te; Wang, Chorng-Kuang |
| 臺大學術典藏 |
2004-09 |
A 0.8-8 GHz 9.7 mW analog-digital dual-loop adaptive-bandwidth DLL based multi-phase clock generator
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Liu, Tsung-Te; Wang, Chorng-Kuang; Liu, Tsung-Te; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2004-08 |
A 14 GHz DLL based low-jitter multi-phase clock generator for low-band ultra-wideband application
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Liu, Tsung-Te; Wang, Chorng-Kuang |
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