| 國立臺灣大學 |
2012 |
A Fully Integrated Hepatitis B Virus DNA Detection SoC based on Monolithic Polysilicon Nanowire CMOS Process
|
Huang, Che-Wei; Huang, Yu-Jie; Yen, Pei-Wen; Hsueh, Hsiao-Ting; Lin, Chia-Yi; Chen, Min-Cheng; Ho, ChiaHua; Yang, Fu-Liang; Tsai, Hann-Huei; Liao, Hsin-Hao; Juang, Ying-Zong; Wang, Chorng-Kuang; Lin, Chih-Ting; Lu, Shey-Shi |
| 國立臺灣大學 |
2011 |
A fully-integrated cantilever based DNA detection SoC in a CMOS Bio-MEMS Process
|
Huang, Yu-Jie; Huang, Che-Wei; Lin, Tsung-Hsien; Lin, Chih-Ting; Chen, Li-Guang; Hsiao, Po-Yun; Wu, Bi-Ru; Hsueh, Hsiao-Ting; Kuo, Bing-Jye; Tsai, Hann-Huei; Liao, Hsin-Hao; Juang, Ying-Zong; Wang, Chorng-Kuang; Lu, Shey-Shi |
| 國立臺灣大學 |
2009 |
A 60-GHz phased array receiver front-end in 0.13-?m CMOS technology
|
Wang, Chao-Shiun; Huang, Juin-Wei; Chu, Kun-Da; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2006-01 |
PLL Circuits, The VLSI Handbook
|
Yuan, Min-shueh; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2005-06 |
Subharmonic direct frequency synthesizer for mode-1 MB-OFDM UWB system
|
Lin, Chien-Chih; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2005-05 |
High speed pilot-less sampling frequency acquisition for DMT systems
|
Chang, Ching-Chi; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2005-05 |
A multi-band multi-standard RF front-end IEEE 802.16a for IEEE 802.16a and IEEE 802.11 a/b/g applications
|
Wang, Chao-Shiun; Li, Wei-Chang; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2005-05 |
Digital VLSI OFDM transceiver architecture for wireless SoC design
|
Tseng, Wei-Hsiang; Chang, Ching-Chi; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2005-05 |
A 15mW 69dB 2 Gsamples/s CMOS analog front-end for low-band UWB applications
|
Lee, Hua-Chin; Lin, Chien-Chih; Wu, Chia-Hsin; Liu, Shen-Iuan; Wang, Chorng-Kuang; Tsao, Hen-Wai |
| 臺大學術典藏 |
2005-05 |
A multi-band multi-standard RF front-end IEEE 802.16a for IEEE 802.16a and IEEE 802.11 a/b/g applications
|
Wang, Chao-Shiun; Li, Wei-Chang; Wang, Chorng-Kuang; Wang, Chao-Shiun; Li, Wei-Chang; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2005-02 |
A regenerative semi-dynamic frequency divider for mode-1 MB-OFDM UWB hopping carrier generation
|
Lin, Chien-chih; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2004-12 |
A variable-length DHT-based FFT/IFFT processor for VDSL/ADSL systems
|
Pao, Tsung-Chieh; Chang, Ching-Chi; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2004-09 |
A 0.8-8 GHz 9.7 mW analog-digital dual-loop adaptive-bandwidth DLL based multi-phase clock generator
|
Liu, Tsung-Te; Wang, Chorng-Kuang |
| 臺大學術典藏 |
2004-09 |
A 0.8-8 GHz 9.7 mW analog-digital dual-loop adaptive-bandwidth DLL based multi-phase clock generator
|
Liu, Tsung-Te; Wang, Chorng-Kuang; Liu, Tsung-Te; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2004-08 |
A 14 GHz DLL based low-jitter multi-phase clock generator for low-band ultra-wideband application
|
Liu, Tsung-Te; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2004-08 |
A 1.8V 2.5-5.2 GHz CMOS dual-input two-stage ring VCO
|
Tu, Wei-Hsuan; Yeh, Jyh-Yih; Tsai, Hung-Chieh; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2004-08 |
A 3.1-10.6 GHz CMOS cascaded two-stage distributed amplifier for ultra-wideband application
|
Chen, Kuan-Hung; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2004-08 |
A dual-band IEEE 802.11a/b/g receiver front-end using half-IF and dual-conversion
|
Hou, Chun-Chih; Chang, Ching-Chi; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2004-08 |
A hardware efficient 64-QAM low-IF transceiver baseband for broadband communications
|
Chang, Ching-Chi; Shiue, Muh-Tian; Wang, Chorng-Kuang |
| 臺大學術典藏 |
2004-08 |
A 14 GHz DLL based low-jitter multi-phase clock generator for low-band ultra-wideband application
|
Liu, Tsung-Te; Wang, Chorng-Kuang; Liu, Tsung-Te; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2004-05 |
A 10 Gbase-LX4 receiver front end transimpedance amplifier and limiting amplifier
|
Tsai, Hung-Chieh; Yeh, Jyh-Yih; Tu, Wei-Hsuan; Lee, Tai-Cheng; Wang, Chorng-Kuang |
| 臺大學術典藏 |
2004-05 |
A 10 Gbase-LX4 receiver front end transimpedance amplifier and limiting amplifier
|
Tsai, Hung-Chieh; Yeh, Jyh-Yih; Tu, Wei-Hsuan; Lee, Tai-Cheng; Wang, Chorng-Kuang; Tsai, Hung-Chieh; Yeh, Jyh-Yih; Tu, Wei-Hsuan; Lee, Tai-Cheng; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2002-08 |
A VLSI architecture of DMT based transceiver for VDSL system
|
Chang, Ching-Chi; Shieu, Muh-Tian; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2002-08 |
All digital CDMA upstream transmitter and baseband VLSI design of head-end receiver for upstream cable networks
|
Su, Keng-Yi; Shieu, Muh-Tain; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2002-08 |
A programmable filter with self-tuning for DMT VDSL receiver
|
Chou, Chia-Hua; Lin, Chien-Chih; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2002-08 |
A dual-loop automatic gain control for infrared communication system
|
Lin, Chien-Chih; Shieu, Muh-Tain; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2002-06 |
A 5.8-GHz two-stage high-linearity low-voltage low noise amplifier in a 0.35-/spl mu/m CMOS technology
|
Liu, Ren-Chieh; Lee, Chung-Rung; Wang, Huei; Wang, Chorng-Kuang |
| 臺大學術典藏 |
2002-06 |
A 5.8-GHz two-stage high-linearity low-voltage low noise amplifier in a 0.35-/spl mu/m CMOS technology
|
Liu, Ren-Chieh; Lee, Chung-Rung; Wang, Huei; Wang, Chorng-Kuang; Liu, Ren-Chieh; Lee, Chung-Rung; Wang, Huei; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2002 |
A 2.4 GHz CMOS Low-IF Receiver Front-End for WLAN Applications
|
Lu, Yi; Huang, Kuang-Hu; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2001-05 |
A wide pull-in range fast acquisition hardware-sharing two-fold carrier recovery loop
|
Chang, Ching-Chi; Lin, Chien-Chih; Shiue, Muh-Tian; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2001-01 |
A 2-V CMOS 455KHz FM/FSK Demodulator using Feedforward Offset Cancellation Limiting Amplifier
|
Huang, Po-Chiun; Chen, Yi-Huei; 汪重光; Huang, Po-Chiun; Chen, Yi-Huei; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2001 |
A 2-V CMOS 455-kHz FM/FSK demodulator using feedforward offsetcancellation limiting amplifier
|
Huang, Po-Chiun; Chen, Yi-Huei; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2000-10 |
A 2-V 10.7MHz CMOS Limiting Amplifier/RSSI
|
Huang, Po-Chiun; Chen, Yi-Huei; 汪重光; Huang, Po-Chiun; Chen, Yi-Huei; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2000-08 |
A 2-V CMOS 455kHz FM/FSK demodulator using feedforward offset cancellation limiting amplifier
|
Huang, Po-Chiun; Chen, Yi-Huei; Liu, Chien-Chih; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2000-08 |
A 2-V 10.7MHz CMOS Limiting Amplifier/RSSI
|
Huang, Po-Chiun; Chen, Yi-Huei; 汪重光; Huang, Po-Chiun; Chen, Yi-Huei; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2000-08 |
A Dual-Loop Automatic Gain Control for 10Mbps Infrared Communication System
|
Lin, Chien-Chih; Chang, Yu-Zieh; Shiue, Muh-Tian; 汪重光; Lin, Chien-Chih; Chang, Yu-Zieh; Shiue, Muh-Tian; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2000-08 |
An FH-SS GFSK Low-IF Receiver for Bluetooth
|
Liao, Wei-Cherng; Huang, Jia-Soy; Shiue, Muh-Tian; 汪重光; Liao, Wei-Cherng; Huang, Jia-Soy; Shiue, Muh-Tian; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2000 |
A 2-V 10.7MHz CMOS Limiting Amplifier/RSSI
|
Huang, Po-Chiun; Chen, Yi-Huei; Wang, Chorng-Kuang |
| 國立臺灣大學 |
1999-10 |
A 2-V 7.2?a Jitter AM-Suppression CMOS Amplifier using Current-Mode Hybrid Magnitude Control
|
Huang, Kuang-Hu; Wang, Wei-Cheng; Yang, Tang-Huei; 汪重光; Huang, Kuang-Hu; Wang, Wei-Cheng; Yang, Tang-Huei; Wang, Chorng-Kuang |
| 國立臺灣大學 |
1999-08 |
A 2 V CMOS programmable pipelined digital differential matched filter for DS-CDMA system
|
Yen, She-Hwa; Wang, Chorng-Kuang |
| 國立臺灣大學 |
1999-08 |
A 2V CMOS Dual-Bandwidth Fast Acquisition Automatic Gain Control Amplifier for Digital Cable Modem
|
Huang, Kuang-Hu; Shiue, Muh-Tian; 汪重光; Huang, Kuang-Hu; Shiue, Muh-Tian; Wang, Chorng-Kuang |
| 國立臺灣大學 |
1999-08 |
A 2V CMOS Programable Pipelined Digital Differential Matched Filter for DS-CDMA System
|
Yen, Shyh-Hua; 汪重光; Yen, Shyh-Hua; Wang, Chorng-Kuang |
| 國立臺灣大學 |
1999 |
A 155-MHz BiCMOS automatic gain control amplifier
|
Huang, Po-Chiun; Huang, Chen-Yi; Wang, Chorng-Kuang |
| 國立臺灣大學 |
1998-11 |
A VLSI Architecture Design for Dual-mode QAM and VSB Digital CATV Tranceiver
|
Shiue, Muh-Tian; 汪重光; Winston I. Way; Shiue, Muh-Tian; Wang, Chorng-Kuang; Winston I. Way |
| 國立臺灣大學 |
1998-02 |
A 2V 7.2 Degree Jitter AM-Suppression CMOS Amplifier Using Current-Mode Hybrid Magnitude Control
|
汪重光; Huang, Kuang-Hu; Yang, Tang-Huei; Tien-Long Deng; Wang, Chorng-Kuang; Huang, Kuang-Hu; Yang, Tang-Huei; Tien-Long Deng |
| 國立臺灣大學 |
1998 |
A 3.3-V CMOS Wideband Exponential Control Variable-Gain-Amplifier
|
Huang, Po-Chiun; Li-Yu Chiou; 汪重光; Huang, Po-Chiun; Li-Yu Chiou; Wang, Chorng-Kuang |
| 國立臺灣大學 |
1998 |
A VLSI Design of Dual-Loop Automatic Gain Control for Dual-Mode QAM/VSB CATV Modem
|
Shiue, Muh-Tian; Huang, Kuang-Hu; Cheng-Chang Lu; 汪重光; Shiue, Muh-Tian; Huang, Kuang-Hu; Cheng-Chang Lu; Wang, Chorng-Kuang |
| 國立臺灣大學 |
1998 |
Low-Power Multirate Architecture for IF Digital Frequency Down-Converter
|
Shyh-Jye Jou; Shou-Yang Wu; 汪重光; Shyh-Jye Jou; Shou-Yang Wu; Wang, Chorng-Kuang |
| 國立臺灣大學 |
1997 |
An Automatic Gain Control Architecture for SONET OC-3 VLSI
|
汪重光; Huang, Po-Chiun; Wang, Chorng-Kuang; Huang, Po-Chiun |
| 國立臺灣大學 |
1996 |
A Pipelined Digital Differential Matched Filter FPGA Implementation and VLSI
|
Liu, Kuang-Chan; Lin, Wun-Chang; 汪重光; Liu, Kuang-Chan; Lin, Wun-Chang; Wang, Chorng-Kuang |
