| 國立臺灣大學 |
2004-08 |
A 1.8V 2.5-5.2 GHz CMOS dual-input two-stage ring VCO
|
Tu, Wei-Hsuan; Yeh, Jyh-Yih; Tsai, Hung-Chieh; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2004-08 |
A 3.1-10.6 GHz CMOS cascaded two-stage distributed amplifier for ultra-wideband application
|
Chen, Kuan-Hung; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2004-08 |
A dual-band IEEE 802.11a/b/g receiver front-end using half-IF and dual-conversion
|
Hou, Chun-Chih; Chang, Ching-Chi; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2004-08 |
A hardware efficient 64-QAM low-IF transceiver baseband for broadband communications
|
Chang, Ching-Chi; Shiue, Muh-Tian; Wang, Chorng-Kuang |
| 臺大學術典藏 |
2004-08 |
A 14 GHz DLL based low-jitter multi-phase clock generator for low-band ultra-wideband application
|
Liu, Tsung-Te; Wang, Chorng-Kuang; Liu, Tsung-Te; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2004-05 |
A 10 Gbase-LX4 receiver front end transimpedance amplifier and limiting amplifier
|
Tsai, Hung-Chieh; Yeh, Jyh-Yih; Tu, Wei-Hsuan; Lee, Tai-Cheng; Wang, Chorng-Kuang |
| 臺大學術典藏 |
2004-05 |
A 10 Gbase-LX4 receiver front end transimpedance amplifier and limiting amplifier
|
Tsai, Hung-Chieh; Yeh, Jyh-Yih; Tu, Wei-Hsuan; Lee, Tai-Cheng; Wang, Chorng-Kuang; Tsai, Hung-Chieh; Yeh, Jyh-Yih; Tu, Wei-Hsuan; Lee, Tai-Cheng; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2002-08 |
A VLSI architecture of DMT based transceiver for VDSL system
|
Chang, Ching-Chi; Shieu, Muh-Tian; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2002-08 |
All digital CDMA upstream transmitter and baseband VLSI design of head-end receiver for upstream cable networks
|
Su, Keng-Yi; Shieu, Muh-Tain; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2002-08 |
A programmable filter with self-tuning for DMT VDSL receiver
|
Chou, Chia-Hua; Lin, Chien-Chih; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2002-08 |
A dual-loop automatic gain control for infrared communication system
|
Lin, Chien-Chih; Shieu, Muh-Tain; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2002-06 |
A 5.8-GHz two-stage high-linearity low-voltage low noise amplifier in a 0.35-/spl mu/m CMOS technology
|
Liu, Ren-Chieh; Lee, Chung-Rung; Wang, Huei; Wang, Chorng-Kuang |
| 臺大學術典藏 |
2002-06 |
A 5.8-GHz two-stage high-linearity low-voltage low noise amplifier in a 0.35-/spl mu/m CMOS technology
|
Liu, Ren-Chieh; Lee, Chung-Rung; Wang, Huei; Wang, Chorng-Kuang; Liu, Ren-Chieh; Lee, Chung-Rung; Wang, Huei; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2002 |
A 2.4 GHz CMOS Low-IF Receiver Front-End for WLAN Applications
|
Lu, Yi; Huang, Kuang-Hu; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2001-05 |
A wide pull-in range fast acquisition hardware-sharing two-fold carrier recovery loop
|
Chang, Ching-Chi; Lin, Chien-Chih; Shiue, Muh-Tian; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2001-01 |
A 2-V CMOS 455KHz FM/FSK Demodulator using Feedforward Offset Cancellation Limiting Amplifier
|
Huang, Po-Chiun; Chen, Yi-Huei; 汪重光; Huang, Po-Chiun; Chen, Yi-Huei; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2001 |
A 2-V CMOS 455-kHz FM/FSK demodulator using feedforward offsetcancellation limiting amplifier
|
Huang, Po-Chiun; Chen, Yi-Huei; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2000-10 |
A 2-V 10.7MHz CMOS Limiting Amplifier/RSSI
|
Huang, Po-Chiun; Chen, Yi-Huei; 汪重光; Huang, Po-Chiun; Chen, Yi-Huei; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2000-08 |
A 2-V CMOS 455kHz FM/FSK demodulator using feedforward offset cancellation limiting amplifier
|
Huang, Po-Chiun; Chen, Yi-Huei; Liu, Chien-Chih; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2000-08 |
A 2-V 10.7MHz CMOS Limiting Amplifier/RSSI
|
Huang, Po-Chiun; Chen, Yi-Huei; 汪重光; Huang, Po-Chiun; Chen, Yi-Huei; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2000-08 |
A Dual-Loop Automatic Gain Control for 10Mbps Infrared Communication System
|
Lin, Chien-Chih; Chang, Yu-Zieh; Shiue, Muh-Tian; 汪重光; Lin, Chien-Chih; Chang, Yu-Zieh; Shiue, Muh-Tian; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2000-08 |
An FH-SS GFSK Low-IF Receiver for Bluetooth
|
Liao, Wei-Cherng; Huang, Jia-Soy; Shiue, Muh-Tian; 汪重光; Liao, Wei-Cherng; Huang, Jia-Soy; Shiue, Muh-Tian; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2000 |
A 2-V 10.7MHz CMOS Limiting Amplifier/RSSI
|
Huang, Po-Chiun; Chen, Yi-Huei; Wang, Chorng-Kuang |
| 國立臺灣大學 |
1999-10 |
A 2-V 7.2?a Jitter AM-Suppression CMOS Amplifier using Current-Mode Hybrid Magnitude Control
|
Huang, Kuang-Hu; Wang, Wei-Cheng; Yang, Tang-Huei; 汪重光; Huang, Kuang-Hu; Wang, Wei-Cheng; Yang, Tang-Huei; Wang, Chorng-Kuang |
| 國立臺灣大學 |
1999-08 |
A 2 V CMOS programmable pipelined digital differential matched filter for DS-CDMA system
|
Yen, She-Hwa; Wang, Chorng-Kuang |
