|
English
|
正體中文
|
简体中文
|
总笔数 :0
|
|
造访人次 :
52813853
在线人数 :
494
教育部委托研究计画 计画执行:国立台湾大学图书馆
|
|
|
"wang cy"的相关文件
显示项目 151-160 / 308 (共31页)
<< < 11 12 13 14 15 16 17 18 19 20 > >>
每页显示[10|25|50]项目
| 國立交通大學 |
2014-12-08T15:41:38Z |
Analysis of chitin oligosaccharides by capillary electrophoresis with laser-induced fluorescence
|
Wang, CY; Hsieh, YZ |
| 國立交通大學 |
2014-12-08T15:41:36Z |
Determination of metabolites of benzene, toluene, ethylbenzene, and xylene by beta-cyclodextrin modified capillary electrophoresis
|
Wang, CY; Huang, CT; Hsieh, YZ |
| 國立交通大學 |
2014-12-08T15:41:36Z |
Automatic interconnection rectification for SoC design verification based on the port order fault model
|
Wang, CY; Tung, SW; Jou, JY |
| 國立交通大學 |
2014-12-08T15:39:49Z |
A novel manufacturing defect detection method using data mining approach
|
Chen, WC; Tseng, SS; Wang, CY |
| 國立交通大學 |
2014-12-08T15:38:58Z |
A SiGe micromixer for 2.4/5.2/5.7GHz multiband WLAN applications
|
Wang, CY; Lu, SS; Meng, CC; Lin, YS |
| 國立交通大學 |
2014-12-08T15:37:28Z |
A GaInP/GaAs HBT micromixer for 2.4/5.2/5.7-Ghz multiband WLAN applications
|
Wang, CY; Lu, SS; Meng, CC; Lin, YS |
| 國立交通大學 |
2014-12-08T15:35:46Z |
Delayed onset of return flow by substrate inclination in model horizontal longitudinal MOCVD processes
|
Kuo, WS; Wang, CY; Tuh, JL; Lin, TF |
| 國立交通大學 |
2014-12-08T15:26:53Z |
On generation of the minimum pattern set for data path elements in SoC design verification based on port order fault model
|
Wang, CY; Tung, SW; Jou, JY |
| 國立交通大學 |
2014-12-08T15:26:47Z |
An improved AVPG algorithm for SoC design verification using port order fault model
|
Wang, CY; Tung, SW; Jou, JY |
| 國立交通大學 |
2014-12-08T15:26:47Z |
Maintenance of sequential patterns for record deletion
|
Wang, CY; Hong, TP; Tseng, SS |
显示项目 151-160 / 308 (共31页)
<< < 11 12 13 14 15 16 17 18 19 20 > >>
每页显示[10|25|50]项目
|
