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Taiwan Academic Institutional Repository >
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"wang cy"
Showing items 151-160 of 308 (31 Page(s) Totally)
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| 國立交通大學 |
2014-12-08T15:41:38Z |
Analysis of chitin oligosaccharides by capillary electrophoresis with laser-induced fluorescence
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Wang, CY; Hsieh, YZ |
| 國立交通大學 |
2014-12-08T15:41:36Z |
Determination of metabolites of benzene, toluene, ethylbenzene, and xylene by beta-cyclodextrin modified capillary electrophoresis
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Wang, CY; Huang, CT; Hsieh, YZ |
| 國立交通大學 |
2014-12-08T15:41:36Z |
Automatic interconnection rectification for SoC design verification based on the port order fault model
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Wang, CY; Tung, SW; Jou, JY |
| 國立交通大學 |
2014-12-08T15:39:49Z |
A novel manufacturing defect detection method using data mining approach
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Chen, WC; Tseng, SS; Wang, CY |
| 國立交通大學 |
2014-12-08T15:38:58Z |
A SiGe micromixer for 2.4/5.2/5.7GHz multiband WLAN applications
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Wang, CY; Lu, SS; Meng, CC; Lin, YS |
| 國立交通大學 |
2014-12-08T15:37:28Z |
A GaInP/GaAs HBT micromixer for 2.4/5.2/5.7-Ghz multiband WLAN applications
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Wang, CY; Lu, SS; Meng, CC; Lin, YS |
| 國立交通大學 |
2014-12-08T15:35:46Z |
Delayed onset of return flow by substrate inclination in model horizontal longitudinal MOCVD processes
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Kuo, WS; Wang, CY; Tuh, JL; Lin, TF |
| 國立交通大學 |
2014-12-08T15:26:53Z |
On generation of the minimum pattern set for data path elements in SoC design verification based on port order fault model
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Wang, CY; Tung, SW; Jou, JY |
| 國立交通大學 |
2014-12-08T15:26:47Z |
An improved AVPG algorithm for SoC design verification using port order fault model
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Wang, CY; Tung, SW; Jou, JY |
| 國立交通大學 |
2014-12-08T15:26:47Z |
Maintenance of sequential patterns for record deletion
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Wang, CY; Hong, TP; Tseng, SS |
Showing items 151-160 of 308 (31 Page(s) Totally)
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