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"wang i ting"的相关文件
显示项目 6-15 / 41 (共5页)
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| 國立交通大學 |
2019-09-02T07:45:40Z |
Development of Three-Dimensional Synaptic Device and Neuromorphic Computing Hardware
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Wang, I-Ting; Chou, Teyuh; Chiu, Li-Wen; Chang, Chih-Cheng; Hou, Tuo-Hung |
| 國立交通大學 |
2019-04-03T06:38:15Z |
Characterization and Modeling of Nonfilamentary Ta/TaOx/TiO2/Ti Analog Synaptic Device
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Wang, Yu-Fen; Lin, Yen-Chuan; Wang, I-Ting; Lin, Tzu-Ping; Hou, Tuo-Hung |
| 國立交通大學 |
2019-04-02T06:04:32Z |
Three dimensional integration of ReRAMs
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Hudec, Boris; Chang, Che-Chia; Wang, I-Ting; Frohlich, Karol; Hou, Tuo-Hung |
| 國立交通大學 |
2018-08-21T05:56:59Z |
Challenges and Opportunities toward Online Training Acceleration using RRAM-based Hardware Neural Network
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Chang, Chih-Cheng; Liu, Jen-Chieh; Shen, Yu-Lin; Chou, Teyuh; Chen, Pin-Chun; Wang, I-Ting; Su, Chih-Chun; Wu, Ming-Hong; Hudec, Boris; Chang, Che-Chia; Tsai, Chia-Ming; Chang, Tian-Sheuan; Wong, H-S Philip; Hou, Tuo-Hung |
| 國立交通大學 |
2018-08-21T05:53:31Z |
Mitigating Asymmetric Nonlinear Weight Update Effects in Hardware Neural Network Based on Analog Resistive Synapse
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Chang, Chih-Cheng; Chen, Pin-Chun; Chou, Teyuh; Wang, I-Ting; Hudec, Boris; Chang, Che-Chia; Tsai, Chia-Ming; Chang, Tian-Sheuan; Hou, Tuo-Hung |
| 國立臺灣師範大學 |
2018-07-24 |
探討臺灣成年人認知環境與動態交通行為之研究
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王怡婷; Wang, I-Ting |
| 國立交通大學 |
2017-04-21T06:56:24Z |
Interface engineered HfO2-based 3D vertical ReRAM
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Hudec, Boris; Wang, I-Ting; Lai, Wei-Li; Chang, Che-Chia; Jancovic, Peter; Frohlich, Karol; Micusik, Matej; Omastova, Maria; Hou, Tuo-Hung |
| 國立交通大學 |
2017-04-21T06:56:16Z |
3D resistive RAM cell design for high-density storage class memory-a review
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Hudec, Boris; Hsu, Chung-Wei; Wang, I-Ting; Lai, Wei-Li; Chang, Che-Chia; Wang, Taifang; Frohlich, Karol; Ho, Chia-Hua; Lin, Chen-Hsi; Hou, Tuo-Hung |
| 國立交通大學 |
2017-04-21T06:55:21Z |
3D Ta/TaOx/TiO2/Ti synaptic array and linearity tuning of weight update for hardware neural network applications
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Wang, I-Ting; Chang, Chih-Cheng; Chiu, Li-Wen; Chou, Teyuh; Hou, Tuo-Hung |
| 國立交通大學 |
2017-04-21T06:49:21Z |
3D Synaptic Architecture with Ultralow sub-10 fJ Energy per Spike for Neuromorphic Computation
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Wang, I-Ting; Lin, Yen-Chuan; Wang, Yu -Fen; Hsu, Chung-Wei; Hou, Tuo-Hung |
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