English  |  正體中文  |  简体中文  |  Total items :0  
Visitors :  52348879    Online Users :  1150
Project Commissioned by the Ministry of Education
Project Executed by National Taiwan University Library
 
臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
About TAIR

Browse By

News

Copyright

Related Links

"wang tahui"

Return to Browse by Author
Sorting by Title Sort by Date

Showing items 1-50 of 122  (3 Page(s) Totally)
1 2 3 > >>
View [10|25|50] records per page

Institution Date Title Author
國立交通大學 2020-10-05T02:01:09Z Design Space Analysis for Cross-Point 1S1MTJ MRAM: Selector-MTJ Cooptimization Chiang, Hung-Li; Chen, Tzu-Chiang; Song, Ming-Yuan; Chen, Yu-Sheng; Chiu, Jung-Piao; Chiang, Katherine; Manfrini, Mauricio; Cai, Jin; Gallagher, William J.; Wang, Tahui; Diaz, Carlos H.; Wong, H. -S. Philip
國立交通大學 2020-02-02T23:54:29Z Analytical Modeling of Read-Induced SET-State Conductance Change in a Hafnium-Oxide Resistive Switching Device Su, Po-Cheng; Jiang, Cheng-Min; Chen, Yu-Jia; Wang, Chih-Chieh; Li, Kai-Shin; Lin, Chao-Cheng; Wang, Tahui
國立交通大學 2020-01-02T00:04:18Z Investigation of Electron and Hole Lateral Migration in Silicon Nitride and Data Pattern Effects on ${V}_{{t}}$ Retention Loss in a Multilevel Charge Trap Flash Memory Liu, Yu-Heng; Zhan, Ting-Chien; Wang, Tahui; Tsai, Wen-Jer; Lu, Tao-Cheng; Chen, Kuang-Chao; Lu, Chih-Yuan
國立交通大學 2019-08-02T02:24:17Z Investigation of Data Pattern Effects on Nitride Charge Lateral Migration in a Charge Trap Flash Memory by Using a Random Telegraph Signal Method Liu, Y. H.; Lin, H. Y.; Jiang, C. M.; Wang, Tahui; Tsai, W. J.; Lu, T. C.; Chen, K. C.; Lu, Chih-Yuan
國立交通大學 2019-08-02T02:24:17Z Chip-Level Characterization and RTN-Induced Error Mitigation beyond 20nm Floating Gate Flash Memory Lin, T. W.; Ku, S. H.; Cheng, C. H.; Lee, C. W.; Ijen-Huang; Tsai, Wen-Jer; Lu, T. C.; Lu, W. P.; Chen, K. C.; Wang, Tahui; Lu, Chih-Yuan
國立交通大學 2019-08-02T02:24:17Z Correlation between SET-State Current Level and Read Disturb Failure Time in a Resistive Switching Memory Su, P. C.; Jiang, C. M.; Wang, C. W.; Wang, Tahui
國立交通大學 2019-04-02T06:04:53Z Error Characterization and ECC Usage Relaxation beyond 20nm Floating Gate NAND Flash Memory Ku, S. H.; Lin, T. W.; Cheng, C. H.; Lee, C. W.; Chen, Ti-Wen; Tsai, Wen-Jer; Lu, T. C.; Lu, W. P.; Chen, K. C.; Wang, Tahui; Lu, Chih-Yuan
國立交通大學 2019-04-02T06:04:37Z Analysis and Realization of TLC or even QLC Operation with a High Performance Multi-times Verify Scheme in 3D NAND Flash memory Lu, C. C.; Cheng, C. C.; Chiu, H. P.; Lin, W. L.; Chen, T. W.; Ku, S. H.; Tsai, Wen-Jer; Lu, T. C.; Chen, K. C.; Wang, Tahui; Lu, Chih-Yuan
國立交通大學 2019-04-02T05:59:54Z Modeling of Read-Disturb-Induced SET-State Current Degradation in a Tungsten Oxide Resistive Switching Memory Su, Po-Cheng; Jiang, Cheng-Min; Wang, Chih-Wei; Wang, Tahui
國立交通大學 2019-04-02T05:59:51Z Variations of V-t Retention Loss in a SONOS Flash Memory Due to a Current-Path Percolation Effect Chou, Y. L.; Chung, Y. T.; Wang, Tahui; Ku, S. H.; Zou, N. K.; Chen, Vincent; Lu, W. P.; Chen, K. C.; Lu, Chih-Yuan
國立交通大學 2018-08-21T05:56:39Z A Numerical Study of Si-TMD Contact with n/p Type Operation and Interface Barrier Reduction for Sub-5 nm Monolayer MoS2 FET Tang, Ying-Tsan; Li, Kai-Shin; Li, Lain-Jong; Li, Ming-Yang; Lin, Chang-Hsien; Chen, Yi-Ju; Chen, Chun-Chi; Su, Chuan-Jung; Wu, Bo-Wei; Wu, Cheng-San; Chen, Min-Cheng; Shieh, Jia-Min; Yeh, Wen-Kuan; Su, Po-Cheng; Wang, Tahui; Yang, Fu-Liang; Hu, Chenming
國立交通大學 2018-08-21T05:56:39Z Polycrystalline-Silicon Channel Trap Induced Transient Read Instability in a 3D NAND Flash Cell String Tsai, Wen-Jer; Lin, W. L.; Cheng, C. C.; Ku, S. H.; Chou, Y. L.; Liu, Lenvis; Hwang, S. W.; Lu, T. C.; Chen, K. C.; Wang, Tahui; Lu, Chih-Yuan
國立交通大學 2018-08-21T05:54:20Z Characterization of nitride hole lateral transport in a charge trap flash memory by using a random telegraph signal method Liu, Yu-Heng; Jiang, Cheng-Min; Lin, Hsiao-Yi; Wang, Tahui; Tsai, Wen-Jer; Lu, Tao-Cheng; Chen, Kuang-Chao; Lu, Chih-Yuan
國立交通大學 2018-08-21T05:53:02Z Characterization and modeling of SET/RESET cycling induced read-disturb failure time degradation in a resistive switching memory Su, Po-Cheng; Hsu, Chun-Chi; Du, Sin-I; Wang, Tahui
國立交通大學 2018-01-24T07:41:43Z 負電容場效電晶體之操作速度及可靠度探討 杜欣憶; 汪大暉; Du, Sin-I; Wang, Tahui
國立交通大學 2018-01-24T07:41:38Z 電阻式記憶體循環操作後導致讀取干擾錯誤時間劣化之研究 許峻齊; 汪大暉; Hsu , Chun-Chi; Wang, Tahui
國立交通大學 2018-01-24T07:38:02Z 以氧化鎢電阻式記憶體探討影響寫入干擾錯誤時間變因之研究 鍾季翰; 汪大暉; Chung, Chi-Han; Wang, TaHui
國立交通大學 2018-01-24T07:38:02Z 氮化矽快閃記憶體的橫向電場引致內部儲存電荷傳輸之特性量測 陳威郡; 汪大暉; Chen, Wei-Chun; Wang, Tahui
國立交通大學 2018-01-24T07:38:02Z 氮化矽快閃記憶體的橫向電場引致內部儲存電荷傳輸之數值模擬 楊宇翔; 汪大暉; 陳旻政; Yang, Yu-Siang; Wang, Tahui; Chen, Min-Cheng
國立交通大學 2018-01-24T07:37:13Z 三維NAND快閃記憶體隨機電報雜訊之特性探討 周佑亮; 汪大暉; Chou, You-Liang; Wang, Tahui
國立交通大學 2018-01-24T07:36:25Z 電阻式記憶體及SONOS快閃式記憶體中介電層缺陷造成之可靠度效應研究 鍾岳庭; 汪大暉; Chung, Yueh-Ting; Wang, Tahui
國立交通大學 2017-04-21T06:56:32Z SET/RESET Cycling-Induced Trap Creation and SET-Disturb Failure Time Degradation in a Resistive-Switching Memory Chung, Yueh-Ting; Su, Po-Cheng; Lin, Wen-Jie; Chen, Min-Cheng; Wang, Tahui
國立交通大學 2017-04-21T06:56:17Z Electric Field Induced Nitride Trapped Charge Lateral Migration in a SONOS Flash Memory Liu, Yu-Heng; Jiang, Cheng-Min; Chen, Wei-Chun; Wang, Tahui; Tsai, Wen-Jer; Lu, Tao-Cheng; Chen, Kuang-Chao; Lu, Chih-Yuan
國立交通大學 2017-04-21T06:56:07Z Electric Field Induced Nitride Trapped Charge Lateral Migration in a SONOS Flash Memory Liu, Yu-Heng; Jiang, Cheng-Min; Chen, Wei-Chun; Wang, Tahui; Tsai, Wen-Jer; Lu, Tao-Cheng; Chen, Kuang-Chao; Lu, Chih-Yuan
國立交通大學 2017-04-21T06:55:39Z Poly-Silicon Trap Position and Pass Voltage Effects on RTN Amplitude in a Vertical NAND Flash Cell String Chou, Y. L.; Wang, Tahui; Lin, Mercator; Chang, Y. W.; Liu, Lenvis; Huang, S. W.; Tsai, W. J.; Lu, T. C.; Chen, K. C.; Lu, Chih-Yuan
國立交通大學 2017-04-21T06:50:09Z Silicide Barrier Engineering Induced Random Telegraph Noise in 1Xnm CMOS Contacts Chen, Min-Cheng; Lin, Chia-Yi; Chen, Bo-Yuan; Lin, Chang-Hsien; Huang, Guo-Wei; Huang, Chien-Chao; Ho, ChiaHua; Wang, Tahui; Hu, Chenming; Yang, Fu-Liang
國立交通大學 2017-04-21T06:49:47Z Estimating the Detection Stability of a Si Nanowire Sensor Using an Additional Charging Electrode Chen, Min-Cheng; Chen, Hsiao-Chien; Lee, Ta-Hsien; Lin, Yu-Hsien; Shih, Jyun-Hung; Wang, Bo-Wei; Hou, Yun-Fang; Chen, Yi-Ju; Lin, Chia-Yi; Lin, Chang-Hsien; Hsieh, Yi-Ping; Ho, ChiaHua; Hua, Mu-Yi; Qiu, Jian-Tai; Wang, Tahui; Yang, Fu-Liang
國立交通大學 2017-04-21T06:49:43Z Investigation of the strained PMOS on (110) substrate Tang, Chun-Jung; Huang, Shih-Hian; Wang, Tahui; Chang, Chih-Sheng
國立交通大學 2017-04-21T06:49:40Z Cell Endurance Prediction from a Large-area SONOS Capacitor Lee, C. H.; Tu, W. H.; Gu, S. H.; Wu, C. W.; Lin, S. W.; Yeh, T. H.; Chen, K. F.; Chen, Y. J.; Hsieh, J. Y.; Huang, I. J.; Zous, N. K.; Han, T. T.; Chen, M. S.; Lu, W. P.; Chen, K. C.; Wang, Tahui; Lu, C. Y.
國立交通大學 2017-04-21T06:49:32Z Overall Operation Considerations for a SONOS-based Memory Lee, C. H.; Tu, W. H.; Chong, L. H.; Gu, S. H.; Chen, K. F.; Chen, Y. J.; Hsieh, J. Y.; Huang, I. J.; Zous, N. K.; Han, T. T.; Chen, M. S.; Lu, W. P.; Chen, K. C.; Wang, Tahui; Lu, C. Y.
國立交通大學 2017-04-21T06:49:14Z Hybrid Si/TMD 2D Electronic Double Channels Fabricated Using Solid CVD Few-Layer-MoS2 Stacking for V-th Matching and CMOS-Compatible 3DFETs Chen, Min-Cheng; Lin, Chia-Yi; Li, Kai-Hsin; Li, Lain-Jong; Chen, Chang-Hsiao; Chuang, Cheng-Hao; Lee, Ming-Dao; Chen, Yi-Ju; Hou, Yun-Fang; Lin, Chang-Hsien; Chen, Chun-Chi; Wu, Bo-Wei; Wu, Cheng-San; Yang, Ivy; Lee, Yao-Jen; Yeh, Wen-Kuan; Wang, Tahui; Yang, Fu-Liang; Hu, Chenming
國立交通大學 2017-04-21T06:49:10Z Characterization and Monte Carlo analysis of secondary electrons induced program disturb in a buried diffusion bit-line SONOS flash memory Tang, Chun-Jung; Li, C. W.; Wang, Tahui; Gu, S. H.; Chen, P. C.; Chang, Y. W.; Lu, T. C.; Lu, W. P.; Chen, K. C.; Lu, Chih-Yuan
國立交通大學 2017-04-21T06:48:58Z Investigation of Factors Affecting SET-Disturb Failure Time in a Resistive Switching Memory Su, P. C.; Chung, Y. T.; Chen, M. C.; Wang, Tahui
國立交通大學 2017-04-21T06:48:24Z Read Current Instability Arising from Random Telegraph Noise in Localized Storage, Multi-Level SONOS Flash Memory Gu, S. H.; Li, C. W.; Wang, Tahui; Lu, W. P.; Chen, K. C.; Ku, Joseph; Lu, Chih-Yuan
國立交通大學 2017-04-21T06:48:18Z TMD FinFET with 4 nm Thin Body and Back Gate Control for Future Low Power Technology Chen, Min-Cheng; Li, Kai-Shin; Li, Lain-Jong; Lu, Ang-Yu; Li, Ming-Yang; Chang, Yung-Huang; Lin, Chang-Hsien; Chen, Yi-Ju; Hou, Yun-Fang; Chen, Chun-Chi; Wu, Bo-Wei; Wu, Cheng-San; Yang, Ivy; Lee, Yao-Jen; Shieh, Jia-Min; Yeh, Wen-Kuan; Shih, Jyun-Hong; Su, Po-Cheng; Sachid, Angada B.; Wang, Tahui; Yang, Fu-Liang; Hu, Chenming
國立交通大學 2017-04-21T06:48:16Z Investigation of charge loss in cycled NBit cells via field and temperature accelerations Tsai, W. J.; Zous, N. K.; Chen, H. Y.; Liu, Lenvis; Yeh, C. C.; Chen, Sam; Lu, W. P.; Wang, Tahui; Ku, Joseph; Lu, Chih-Yuan
國立交通大學 2017-04-21T06:48:16Z Effects of width scaling, length scaling, and layout variation on electromigrationin in dual damascene copper interconnects Lin, M. H.; Chang, K. P.; Su, K. C.; Wang, Tahui
國立交通大學 2017-04-21T06:48:15Z Insight of stress effect on the ONO stack layer in a SONOS-type flash memory cell Yeh, C. C.; Liao, Y. Y.; Wang, Tahui; Tsai, W. J.; Lu, T. C.; Kao, H. L.; Ou, T. F.; Chen, M. S.; Chen, Y. K.; Lai, E. K.; Shih, Y. H.; Ting, WenChi; Ku, Y. H. Joseph; Lit, Chih-Yuan
國立交通大學 2016-03-29T00:01:16Z 電阻式記憶體陣列內新式可靠性效應與物理機制、統計分析量測及三度空間可靠性模擬 汪大暉; WANG TAHUI
國立交通大學 2016-03-28T08:17:26Z 單電荷與輻射效應在先進CMOS 和SONOS 元件可靠性之統計量測與模式 汪大暉; WANG TAHUI
國立交通大學 2016-03-28T08:17:17Z 電阻式記憶體陣列內新式可靠性效應與物理機制、統計分析量測及三度空間可靠性模擬 汪大暉; WANG TAHUI
國立交通大學 2015-11-26T01:06:49Z 氧化鉿電阻式記憶體之操作方法與隨機電報雜訊研究 王柏偉; Wang, Bo-Wei; 汪大暉; 陳旻政; Wang, Tahui; Chen, Min-Cheng
國立交通大學 2015-11-26T01:02:27Z 雙介電層低功耗電阻式記憶體之設計與最佳化 楊勝博; Yang, Shang-Po; 莊紹勳; 汪大暉; Chung, Shao-Shiun; Wang, Tahui
國立交通大學 2015-11-26T01:02:22Z 電阻式記憶體操作後導致缺陷產生與寫入干擾錯誤時間劣化之研究 林汶潔; Lin, Wen-Chieh; 汪大暉; Wang, Tahui
國立交通大學 2015-11-26T01:02:22Z 不同介電質的平面式及閘極環繞式氮化矽快閃記憶體之寫入/抹除/保存模擬 蔡德宏; Tsai, Te-Hung; 汪大暉; Wang, Tahui
國立交通大學 2015-07-21T08:28:33Z Cycling-Induced SET-Disturb Failure Time Degradation in a Resistive Switching Memory Chung, Yueh-Ting; Su, Po-Cheng; Cheng, Yu-Hsuan; Wang, Tahui; Chen, Min-Cheng; Lu, Chih-Yuan
國立交通大學 2014-12-13T10:51:20Z 次32奈米CMOS元件可靠性分析、量子結構效應、與蒙地卡羅電荷傳輸模擬 汪大暉; WANG TAHUI
國立交通大學 2014-12-13T10:50:25Z 次50奈米二位元儲存氮化矽快閃式記憶體元件之結構、電荷傳輸與可靠性研究 汪大暉; WANG TAHUI
國立交通大學 2014-12-13T10:47:45Z 薄氧化層中漏電流與Soft Breakdown特性與機制研究 汪大暉; WANG TAHUI
國立交通大學 2014-12-13T10:46:43Z 次32奈米CMOS元件可靠性分析、量子結構效應、與蒙地卡羅電荷傳輸模擬 汪大暉; WANG TAHUI

Showing items 1-50 of 122  (3 Page(s) Totally)
1 2 3 > >>
View [10|25|50] records per page