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Taiwan Academic Institutional Repository >
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"wang tahui"
Showing items 26-50 of 122 (5 Page(s) Totally) << < 1 2 3 4 5 > >> View [10|25|50] records per page
國立交通大學 |
2017-04-21T06:50:09Z |
Silicide Barrier Engineering Induced Random Telegraph Noise in 1Xnm CMOS Contacts
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Chen, Min-Cheng; Lin, Chia-Yi; Chen, Bo-Yuan; Lin, Chang-Hsien; Huang, Guo-Wei; Huang, Chien-Chao; Ho, ChiaHua; Wang, Tahui; Hu, Chenming; Yang, Fu-Liang |
國立交通大學 |
2017-04-21T06:49:47Z |
Estimating the Detection Stability of a Si Nanowire Sensor Using an Additional Charging Electrode
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Chen, Min-Cheng; Chen, Hsiao-Chien; Lee, Ta-Hsien; Lin, Yu-Hsien; Shih, Jyun-Hung; Wang, Bo-Wei; Hou, Yun-Fang; Chen, Yi-Ju; Lin, Chia-Yi; Lin, Chang-Hsien; Hsieh, Yi-Ping; Ho, ChiaHua; Hua, Mu-Yi; Qiu, Jian-Tai; Wang, Tahui; Yang, Fu-Liang |
國立交通大學 |
2017-04-21T06:49:43Z |
Investigation of the strained PMOS on (110) substrate
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Tang, Chun-Jung; Huang, Shih-Hian; Wang, Tahui; Chang, Chih-Sheng |
國立交通大學 |
2017-04-21T06:49:40Z |
Cell Endurance Prediction from a Large-area SONOS Capacitor
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Lee, C. H.; Tu, W. H.; Gu, S. H.; Wu, C. W.; Lin, S. W.; Yeh, T. H.; Chen, K. F.; Chen, Y. J.; Hsieh, J. Y.; Huang, I. J.; Zous, N. K.; Han, T. T.; Chen, M. S.; Lu, W. P.; Chen, K. C.; Wang, Tahui; Lu, C. Y. |
國立交通大學 |
2017-04-21T06:49:32Z |
Overall Operation Considerations for a SONOS-based Memory
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Lee, C. H.; Tu, W. H.; Chong, L. H.; Gu, S. H.; Chen, K. F.; Chen, Y. J.; Hsieh, J. Y.; Huang, I. J.; Zous, N. K.; Han, T. T.; Chen, M. S.; Lu, W. P.; Chen, K. C.; Wang, Tahui; Lu, C. Y. |
國立交通大學 |
2017-04-21T06:49:14Z |
Hybrid Si/TMD 2D Electronic Double Channels Fabricated Using Solid CVD Few-Layer-MoS2 Stacking for V-th Matching and CMOS-Compatible 3DFETs
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Chen, Min-Cheng; Lin, Chia-Yi; Li, Kai-Hsin; Li, Lain-Jong; Chen, Chang-Hsiao; Chuang, Cheng-Hao; Lee, Ming-Dao; Chen, Yi-Ju; Hou, Yun-Fang; Lin, Chang-Hsien; Chen, Chun-Chi; Wu, Bo-Wei; Wu, Cheng-San; Yang, Ivy; Lee, Yao-Jen; Yeh, Wen-Kuan; Wang, Tahui; Yang, Fu-Liang; Hu, Chenming |
國立交通大學 |
2017-04-21T06:49:10Z |
Characterization and Monte Carlo analysis of secondary electrons induced program disturb in a buried diffusion bit-line SONOS flash memory
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Tang, Chun-Jung; Li, C. W.; Wang, Tahui; Gu, S. H.; Chen, P. C.; Chang, Y. W.; Lu, T. C.; Lu, W. P.; Chen, K. C.; Lu, Chih-Yuan |
國立交通大學 |
2017-04-21T06:48:58Z |
Investigation of Factors Affecting SET-Disturb Failure Time in a Resistive Switching Memory
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Su, P. C.; Chung, Y. T.; Chen, M. C.; Wang, Tahui |
國立交通大學 |
2017-04-21T06:48:24Z |
Read Current Instability Arising from Random Telegraph Noise in Localized Storage, Multi-Level SONOS Flash Memory
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Gu, S. H.; Li, C. W.; Wang, Tahui; Lu, W. P.; Chen, K. C.; Ku, Joseph; Lu, Chih-Yuan |
國立交通大學 |
2017-04-21T06:48:18Z |
TMD FinFET with 4 nm Thin Body and Back Gate Control for Future Low Power Technology
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Chen, Min-Cheng; Li, Kai-Shin; Li, Lain-Jong; Lu, Ang-Yu; Li, Ming-Yang; Chang, Yung-Huang; Lin, Chang-Hsien; Chen, Yi-Ju; Hou, Yun-Fang; Chen, Chun-Chi; Wu, Bo-Wei; Wu, Cheng-San; Yang, Ivy; Lee, Yao-Jen; Shieh, Jia-Min; Yeh, Wen-Kuan; Shih, Jyun-Hong; Su, Po-Cheng; Sachid, Angada B.; Wang, Tahui; Yang, Fu-Liang; Hu, Chenming |
國立交通大學 |
2017-04-21T06:48:16Z |
Investigation of charge loss in cycled NBit cells via field and temperature accelerations
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Tsai, W. J.; Zous, N. K.; Chen, H. Y.; Liu, Lenvis; Yeh, C. C.; Chen, Sam; Lu, W. P.; Wang, Tahui; Ku, Joseph; Lu, Chih-Yuan |
國立交通大學 |
2017-04-21T06:48:16Z |
Effects of width scaling, length scaling, and layout variation on electromigrationin in dual damascene copper interconnects
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Lin, M. H.; Chang, K. P.; Su, K. C.; Wang, Tahui |
國立交通大學 |
2017-04-21T06:48:15Z |
Insight of stress effect on the ONO stack layer in a SONOS-type flash memory cell
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Yeh, C. C.; Liao, Y. Y.; Wang, Tahui; Tsai, W. J.; Lu, T. C.; Kao, H. L.; Ou, T. F.; Chen, M. S.; Chen, Y. K.; Lai, E. K.; Shih, Y. H.; Ting, WenChi; Ku, Y. H. Joseph; Lit, Chih-Yuan |
國立交通大學 |
2016-03-29T00:01:16Z |
電阻式記憶體陣列內新式可靠性效應與物理機制、統計分析量測及三度空間可靠性模擬
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汪大暉; WANG TAHUI |
國立交通大學 |
2016-03-28T08:17:26Z |
單電荷與輻射效應在先進CMOS 和SONOS 元件可靠性之統計量測與模式
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汪大暉; WANG TAHUI |
國立交通大學 |
2016-03-28T08:17:17Z |
電阻式記憶體陣列內新式可靠性效應與物理機制、統計分析量測及三度空間可靠性模擬
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汪大暉; WANG TAHUI |
國立交通大學 |
2015-11-26T01:06:49Z |
氧化鉿電阻式記憶體之操作方法與隨機電報雜訊研究
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王柏偉; Wang, Bo-Wei; 汪大暉; 陳旻政; Wang, Tahui; Chen, Min-Cheng |
國立交通大學 |
2015-11-26T01:02:27Z |
雙介電層低功耗電阻式記憶體之設計與最佳化
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楊勝博; Yang, Shang-Po; 莊紹勳; 汪大暉; Chung, Shao-Shiun; Wang, Tahui |
國立交通大學 |
2015-11-26T01:02:22Z |
電阻式記憶體操作後導致缺陷產生與寫入干擾錯誤時間劣化之研究
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林汶潔; Lin, Wen-Chieh; 汪大暉; Wang, Tahui |
國立交通大學 |
2015-11-26T01:02:22Z |
不同介電質的平面式及閘極環繞式氮化矽快閃記憶體之寫入/抹除/保存模擬
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蔡德宏; Tsai, Te-Hung; 汪大暉; Wang, Tahui |
國立交通大學 |
2015-07-21T08:28:33Z |
Cycling-Induced SET-Disturb Failure Time Degradation in a Resistive Switching Memory
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Chung, Yueh-Ting; Su, Po-Cheng; Cheng, Yu-Hsuan; Wang, Tahui; Chen, Min-Cheng; Lu, Chih-Yuan |
國立交通大學 |
2014-12-13T10:51:20Z |
次32奈米CMOS元件可靠性分析、量子結構效應、與蒙地卡羅電荷傳輸模擬
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汪大暉; WANG TAHUI |
國立交通大學 |
2014-12-13T10:50:25Z |
次50奈米二位元儲存氮化矽快閃式記憶體元件之結構、電荷傳輸與可靠性研究
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汪大暉; WANG TAHUI |
國立交通大學 |
2014-12-13T10:47:45Z |
薄氧化層中漏電流與Soft Breakdown特性與機制研究
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汪大暉; WANG TAHUI |
國立交通大學 |
2014-12-13T10:46:43Z |
次32奈米CMOS元件可靠性分析、量子結構效應、與蒙地卡羅電荷傳輸模擬
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汪大暉; WANG TAHUI |
Showing items 26-50 of 122 (5 Page(s) Totally) << < 1 2 3 4 5 > >> View [10|25|50] records per page
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