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"wang tu chih"的相關文件
顯示項目 21-38 / 38 (共2頁)
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| 國立臺灣大學 |
2003-05 |
Hardware architecture design for variable block size motion estimation in MPEG-4 AVC/JVT/ITU-T H.264
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Huang, Yu-Wen; Wang, Tu-Chih; Hsieh, Bing-Yu; Chen, Liang-Gee |
| 臺大學術典藏 |
2003-05 |
High speed memory efficient EBCOT architecture for JPEG2000
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Fang, Hung-Chi; Wang, Tu-Chih; Lian, Chung-Jr; Chang, Te-Hao; Chen, Liang-Gee; Fang, Hung-Chi; Wang, Tu-Chih; Lian, Chung-Jr; Chang, Te-Hao; Chen, Liang-Gee |
| 臺大學術典藏 |
2003-05 |
Parallel 4×4 2D transform and inverse transform architecture for MPEG-4 AVC/H.264
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Wang, Tu-Chih; Huang, Yu-Wen; Fang, Hung-Chi; Chen, Liang-Gee; Wang, Tu-Chih; Huang, Yu-Wen; Fang, Hung-Chi; Chen, Liang-Gee |
| 臺大學術典藏 |
2003-05 |
Hardware architecture design for variable block size motion estimation in MPEG-4 AVC/JVT/ITU-T H.264
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Hsieh, Bing-Yu; Chen, Liang-Gee; Wang, Tu-Chih; Huang, Yu-Wen; Wang, Tu-Chih; Hsieh, Bing-Yu; Chen, Liang-Gee; Huang, Yu-Wen |
| 國立臺灣大學 |
2003-04 |
Analysis and reduction of reference frames for motion estimation in MPEG-4 AVC/JVT/H.264
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Huang, Yu-Wen; Hsieh, Bing-Yu; Wang, Tu-Chih; Chien, Shao-Yi; Ma, Shyh-Yih; Shen, Chun-Fu; Chen, Liang-Gee |
| 國立臺灣大學 |
2002-10 |
Real-time deblocking filter for MPEG-4 systems
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Fang, Hung-Chi; Wang, Tu-Chih; Chen, Liang-Gee |
| 國立臺灣大學 |
2002-08 |
Low delay, error robust wireless video transmission architecture for video communication
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Wang, Tu-Chih; Fang, Hung-Chi; Chen, Liang-Gee |
| 國立臺灣大學 |
2002-05 |
An UVLC encoder architecture for H.26L
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Wang, Tu-Chih; Fang, Hung-Chi; Chao, Wei-Min; Chen, Hong-Hui; Chen, Liang-Gee |
| 臺大學術典藏 |
2002-05 |
An UVLC encoder architecture for H.26L
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Wang, Tu-Chih; Fang, Hung-Chi; Chao, Wei-Min; Chen, Hong-Hui; Chen, Liang-Gee; Wang, Tu-Chih; Fang, Hung-Chi; Chao, Wei-Min; Chen, Hong-Hui; Chen, Liang-Gee |
| 國立臺灣大學 |
2002 |
Low-delay and error-robust wireless video transmission for video communications
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Wang, Tu-Chih; Fang, Hung-Chi; Chen, Liang-Gee |
| 國立臺灣大學 |
2001-06 |
H.26L intra mode encoder architecture for digital camera application
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Wang, Tu-Chih; Tseng, Po-Chih; Chen, Liang-Gee |
| 臺大學術典藏 |
2001-06 |
H.26L intra mode encoder architecture for digital camera application
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Chen, Liang-Gee; Tseng, Po-Chih; Wang, Tu-Chih; Wang, Tu-Chih; Tseng, Po-Chih; Chen, Liang-Gee |
| 國立臺灣大學 |
2001 |
A novel low-power full-search block-matching motion-estimationdesign for H.263+
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Shen, Jun-Fu; Wang, Tu-Chih; Chen, Liang-Gee |
| 國立臺灣大學 |
2001 |
A Programmable Parallel VLSI Architecture for 2-D Discrete Wavelet Transform
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Chen, Chien-Yu; Yang, Zhong-Lan; Wang, Tu-Chih; Chen, Liang-Gee |
| 國立臺灣大學 |
2000-05 |
A programmable VLSI architecture for 2-D discrete wavelet transform
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Chen, Chien-Yu; Yang, Zhong-Lan; Wang, Tu-Chih; Chen, Liang-Gee |
| 臺大學術典藏 |
2000-05 |
A programmable VLSI architecture for 2-D discrete wavelet transform
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Chen, Chien-Yu; Yang, Zhong-Lan; Wang, Tu-Chih; Chen, Liang-Gee; Chen, Chien-Yu; Yang, Zhong-Lan; Wang, Tu-Chih; Chen, Liang-Gee |
| 國立臺灣大學 |
1999-06 |
Low power full-search block-matching motion estimation chip for H.263+
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Shen, Jun-Fu; Chen, Liang-Gee; Chang, Hao-Chieh; Wang, Tu-Chih |
| 臺大學術典藏 |
1999-06 |
Low power full-search block-matching motion estimation chip for H.263+
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Shen, Jun-Fu; Chen, Liang-Gee; Chang, Hao-Chieh; Wang, Tu-Chih; Shen, Jun-Fu; Chen, Liang-Gee; Chang, Hao-Chieh; Wang, Tu-Chih |
顯示項目 21-38 / 38 (共2頁)
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