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"wei chung hsu"的相關文件
顯示項目 161-185 / 261 (共11頁)
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| 臺大學術典藏 |
2020-05-04T08:08:17Z |
Automatically migrating sequential applications to heterogeneous system architecture
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Liang, C.-Y.; Fu, S.-Y.; Liu, Y.-P.; Hsu, W.-C.; WEI-CHUNG HSU |
| 臺大學術典藏 |
2020-05-04T08:08:17Z |
Efficient synthetic light field generation using adaptive multi-level rendering
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Tseng, L.-C.;Hsu, W.-C.; Tseng, L.-C.; Hsu, W.-C.; WEI-CHUNG HSU |
| 臺大學術典藏 |
2020-05-04T08:08:17Z |
Dynamic tuning of applications using restricted transactional memory
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Lin, S.-K.; Hong, D.-Y.; Fu, S.-Y.; Wu, J.-J.; Hsu, W.-C.; WEI-CHUNG HSU |
| 臺大學術典藏 |
2020-05-04T08:08:17Z |
Efficient Dynamic device placement for deep neural network training on heterogeneous systems
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Huang, Z.X.;Fu, S.Y.;Hsu, W.C.; Huang, Z.X.; Fu, S.Y.; Hsu, W.C.; WEI-CHUNG HSU |
| 臺大學術典藏 |
2020-05-04T08:08:16Z |
Exploiting vector processing in dynamic binary translation
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Lin, C.-M.;Fu, S.-Y.;Hong, D.-Y.;Liu, Y.-P.;Wu, J.-J.;Hsu, W.-C.; Lin, C.-M.; Fu, S.-Y.; Hong, D.-Y.; Liu, Y.-P.; Wu, J.-J.; Hsu, W.-C.; WEI-CHUNG HSU |
| 臺大學術典藏 |
2020-05-04T08:08:16Z |
Exploiting SIMD asymmetry in Arm-to-X86 dynamic binary translation
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Liu, Y.-P.;Hong, D.-Y.;Wu, J.-J.;Fu, S.-Y.;Hsu, W.-C.; Liu, Y.-P.; Hong, D.-Y.; Wu, J.-J.; Fu, S.-Y.; Hsu, W.-C.; WEI-CHUNG HSU |
| 臺大學術典藏 |
2020-05-04T08:08:16Z |
Optimizing data permutations in structured loads/stores translation and SIMD register mapping for a cross-ISA dynamic binary translator
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Fu, S.-Y.;Hong, D.-Y.;Liu, Y.-P.;Wu, J.-J.;Hsu, W.-C.; Fu, S.-Y.; Hong, D.-Y.; Liu, Y.-P.; Wu, J.-J.; Hsu, W.-C.; WEI-CHUNG HSU |
| 臺大學術典藏 |
2019 |
Readmission after Adult Uvulopalatopharyngoplasty: A Population-Based Inpatient Cohort Study in Taiwan
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WEI-CHUNG HSU; Kang, Kun-Tai; Lee, Chia-Hsuan; Yeh, Te-Huei; Ko, Jenq-Yuh; Hsu, Wei-Chung; Hsu, Ying-Shuo; Hsu, Ying-Shuo;Hsu, Wei-Chung;Ko, Jenq-Yuh;Yeh, Te-Huei;Lee, Chia-Hsuan;Kang, Kun-Tai |
| 臺大學術典藏 |
2018-09-10T15:33:06Z |
SIMD code translation in an enhanced HQEMU
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Fu, S.-Y.; Hong, D.-Y.; Wu, J.-J.; Liu, P.; Hsu, W.-C.; Fu, S.-Y.; Hong, D.-Y.; Wu, J.-J.; Liu, P.; Hsu, W.-C.; WEI-CHUNG HSU |
| 臺大學術典藏 |
2018-09-10T15:33:06Z |
Building a KVM-based hypervisor for a heterogeneous system architecture compliant system
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Huang, Y.-J.; Wu, H.-H.; Chung, Y.-C.; Hsu, W.-C.; Huang, Y.-J.; Wu, H.-H.; Chung, Y.-C.; Hsu, W.-C.; WEI-CHUNG HSU |
| 臺大學術典藏 |
2018-09-10T15:23:05Z |
Runtime techniques for efficient Ray-Tracing on heterogeneous systems
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Kao, C.-C.;Hsu, W.-C.; Kao, C.-C.; Hsu, W.-C.; WEI-CHUNG HSU |
| 臺大學術典藏 |
2018-09-10T15:23:05Z |
Optimizing control transfer and memory virtualization in full system emulators
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Hong, D.-Y.;Hsu, C.-C.;Chou, C.-Y.;Hsu, W.-C.;Liu, P.;Wu, J.-J.; Hong, D.-Y.; Hsu, C.-C.; Chou, C.-Y.; Hsu, W.-C.; Liu, P.; Wu, J.-J.; WEI-CHUNG HSU |
| 臺大學術典藏 |
2018-09-10T15:23:05Z |
Improving SIMD code generation in QEMU
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Fu, S.-Y.;Wu, J.-J.;Hsu, W.-C.; Fu, S.-Y.; Wu, J.-J.; Hsu, W.-C.; WEI-CHUNG HSU |
| 臺大學術典藏 |
2018-09-10T15:23:05Z |
HSPT: Practical implementation and efficient management of embedded shadow page tables for cross-ISA system virtual machines
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Wang, Z.;Li, J.;Wu, C.;Yang, D.;Wang, Z.;Hsu, W.-C.;Li, B.;Guan, Y.; Wang, Z.; Li, J.; Wu, C.; Yang, D.; Wang, Z.; Hsu, W.-C.; Li, B.; Guan, Y.; WEI-CHUNG HSU |
| 臺大學術典藏 |
2018-09-10T15:23:05Z |
HSA Simulators
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Chung, Y.-C.;Hsu, W.-C.;Hung, S.-H.;Jablin, T.B.;Kaeli, D.;Sun, Y.;Ubal, R.; Chung, Y.-C.; Hsu, W.-C.; Hung, S.-H.; Jablin, T.B.; Kaeli, D.; Sun, Y.; Ubal, R.; WEI-CHUNG HSU |
| 臺大學術典藏 |
2018-09-10T15:23:05Z |
Automatic validation for binary translation
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Chen, J.-Y.;Yang, W.;Shen, B.-Y.;Li, Y.-J.;Hsu, W.-C.; Chen, J.-Y.; Yang, W.; Shen, B.-Y.; Li, Y.-J.; Hsu, W.-C.; WEI-CHUNG HSU |
| 臺大學術典藏 |
2018-09-10T15:23:05Z |
An adaptive heterogeneous runtime framework for irregular applications
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Kao, C.-C.;Hsu, W.-C.; Kao, C.-C.; Hsu, W.-C.; WEI-CHUNG HSU |
| 臺大學術典藏 |
2018-09-10T15:23:05Z |
A dynamic binary translation system in a client/server environment
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WEI-CHUNG HSU; Wu, J.-J.; Hsu, C.-C.;Hong, D.-Y.;Hsu, W.-C.;Liu, P.;Wu, J.-J.; Hsu, C.-C.; Hong, D.-Y.; Hsu, W.-C.; Liu, P. |
| 臺大學術典藏 |
2018-09-10T14:57:48Z |
Extended instruction exploration for multiple-issue architectures
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Wu, I.-W.;Shann, J.J.-J.;Hsu, W.-C.;Chung, C.-P.; Wu, I.-W.; Shann, J.J.-J.; Hsu, W.-C.; Chung, C.-P.; WEI-CHUNG HSU |
| 臺大學術典藏 |
2018-09-10T14:57:48Z |
Efficient memory virtualization for cross-ISA system mode emulation
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Chang, C.-J.;Wu, J.-J.;Hsu, W.-C.;Liu, P.;Yew, P.-C.; Chang, C.-J.; Wu, J.-J.; Hsu, W.-C.; Liu, P.; Yew, P.-C.; WEI-CHUNG HSU |
| 臺大學術典藏 |
2018-09-10T14:57:48Z |
Efficient and retargetable dynamic binary translation on multicores
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Hong, D.-Y.;Wu, J.-J.;Yew, P.-C.;Hsu, W.-C.;Hsu, C.-C.;Liu, P.;Wang, C.-M.;Chung, Y.-C.; Hong, D.-Y.; Wu, J.-J.; Yew, P.-C.; Hsu, W.-C.; Hsu, C.-C.; Liu, P.; Wang, C.-M.; Chung, Y.-C.; WEI-CHUNG HSU |
| 臺大學術典藏 |
2018-09-10T14:57:48Z |
Dynamic and adaptive calling context encoding
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Li, J.;Wang, Z.;Wu, C.;Hsu, W.-C.;Xu, D.; Li, J.; Wang, Z.; Wu, C.; Hsu, W.-C.; Xu, D.; WEI-CHUNG HSU |
| 臺大學術典藏 |
2018-09-10T14:57:48Z |
DBILL: An efficient and retargetable dynamic binary instrumentation framework using LLVM backend
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Lyu, Y.-H.;Hong, D.-Y.;Wu, T.-Y.;Wu, J.-J.;Hsu, W.-C.;Liu, P.;Yew, P.-C.; Lyu, Y.-H.; Hong, D.-Y.; Wu, T.-Y.; Wu, J.-J.; Hsu, W.-C.; Liu, P.; Yew, P.-C.; WEI-CHUNG HSU |
| 臺大學術典藏 |
2018-09-10T14:57:48Z |
Code scheduling and register allocation in large basic blocks
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Goodman, J.R.;Hsu, W.-C.; Goodman, J.R.; Hsu, W.-C.; WEI-CHUNG HSU |
| 臺大學術典藏 |
2018-09-10T14:57:48Z |
Author retrospective for code scheduling and register allocation in large basic blocks
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Goodman, J.R.;Hsu, W.C.; Goodman, J.R.; Hsu, W.C.; WEI-CHUNG HSU |
顯示項目 161-185 / 261 (共11頁)
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