臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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Institution	Date	Title	Author
國立交通大學	2014-12-08T15:08:26Z	A 0.22nJ/b/iter 0.13 mu m turbo decoder chip using inter-block permutation interleaver	Wong, Cheng-Chi; Tang, Cheng-Hao; Lai, Ming-Wei; Zheng, Yan-Xiu; Lin, Chien-Ching; Chang, Hsie-Chia; Lee, Chen-Yi; Su, Yu-T.
國立交通大學	2014-12-08T15:07:28Z	Turbo Decoder Using Contention-Free Interleaver and Parallel Architecture	Wong, Cheng-Chi; Lai, Ming-Wei; Lin, Chien-Ching; Chang, Hsie-Chia; Lee, Chen-Yi
國立交通大學	2014-12-08T15:06:36Z	Reconfigurable Turbo Decoder With Parallel Architecture for 3GPP LTE System	Wong, Cheng-Chi; Chang, Hsie-Chia

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