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"wong shyh chyi"的相關文件
顯示項目 1-12 / 12 (共1頁)
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| 國立交通大學 |
2019-04-02T06:04:51Z |
Temperature Insensitive PA Bias Circuit With Digital Control Interface Using InGaP/GaAs HBT Technology
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Chang, Wei-Ling; Meng, Chinchun; Wong, Shyh-Chyi; Chien, Hwey; Huang, Guo-Wei |
| 國立交通大學 |
2019-04-02T06:04:37Z |
5-6 GHz 9.4 mW CMOS Direct-Conversion Passive-Mixer Receiver With Low-Flicker-Noise Corner
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Hsiao, Yu-Chih; Meng, Chinchun; Syu, Jin-Siang; Lin, Chung-Yo; Wong, Shyh-Chyi; Huang, Guo-Wei |
| 國立交通大學 |
2017-04-21T06:49:47Z |
Temperature Insensitive PA Bias Circuit With Digital Control Interface Using InGaP/GaAs HBT Technology
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Chang, Wei-Ling; Meng, Chinchun; Wong, Shyh-Chyi; Chien, Hwey; Huang, Guo-Wei |
| 國立成功大學 |
2007-10 |
A high gain, low noise WLAN receiver for dual if double downconversion application in 90-nm RF CMOS
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Chang, Chieh-Pin; Hou, Jian-An; Su, Jionguang; Chen, Ja-Hao; Chen, Chih-Wei; Liou, Tsyr-Shyang; Wong, Shyh-Chyi; Wang, Yeong-Her |
| 國立成功大學 |
2007-01 |
A low supply voltage VCO implemented by a single common-source 90 nm CMOS transistor
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Hou, Jian-An; Chang, Chieh-Pin; Su, Jionguang; Liou, Tsyr-Shyang; Wong, Shyh-Chyi; Wang, Yeong-Her; Wang, Yeong-Her |
| 國立成功大學 |
2006-11 |
A high gain, and low supply voltage LNA for the direct conversion application with 4-KV HBM ESD protection in 90-nm RF CMOS
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Chang, Chieh-Pin; Hou, Jian-An; Su, Jionguang; Chen, Chih-Wei; Liou, Tsyr-Shyang; Wong, Shyh-Chyi; Wang, Yeong-Her |
| 國立成功大學 |
2002-11 |
Breakdown and stress-induced oxide degradation mechanisms in MOSFETs
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Chen, J. H.; Wei, C. T.; Hung, S. M.; Wong, Shyh-Chyi; Wang, Yeong-Her |
| 國立成功大學 |
2002 |
Thin oxide breakdown mechanism of constant voltage stress on MOSFETs
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Chen, J. H.; Wei, C. T.; Wong, Shyh-Chyi; Wang, Yeong-Her |
| 國立成功大學 |
2001-12 |
DC pulse hot-carrier-stress effects on gate-induced drain leakage current in n-channel MOSFETs
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Chen, Ja-Hao; Wong, Shyh-Chyi; Wang, Yeong-Her |
| 國立成功大學 |
2001-07 |
An analytic three-terminal band-to-band tunneling model on GIDL in MOSFET
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Chen, Ja-Hao; Wong, Shyh-Chyi; Wang, Yeong-Her |
| 國立成功大學 |
2001-07 |
Characterization of polysilicon resistors in sub-0.25 mu m CMOS ULSI applications
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Liu, Wen-Chau; Thei, Kong-Beng; Chuang, Hung-Ming; Lin, Kun-Wei; Cheng, Chin-Chuan; Ho, Yen-Shih; Su, Chi-Wen; Wong, Shyh-Chyi; Lin, Chih-Hsien; Diaz, C. H. |
| 國立成功大學 |
1998-07 |
A DC model for asymmetric trapezoidal gate MOSFET's in strong inversion
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Wong, Shyh-Chyi; Hsu, Shyh-Yuan; Wang, Yeong-Her; Houng, Mau-Phon; Cho, Shih-Keng |
顯示項目 1-12 / 12 (共1頁)
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