| 臺大學術典藏 |
2018-09-10T06:31:54Z |
Robust packet detector based automatic gain control algorithm for OFDM-based ultra-wideband systems
|
Chu, N.-Y.; Lai, J.-T.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T06:31:54Z |
Multilevel LINC system design for power efficiency enhancement
|
Jheng, K.-Y.; Chen, Y.-J.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T06:31:53Z |
A power-aware reconfigurable rendering engine design with 453MPixels/s, 16.4MTriangles/s performance
|
Chao, C.-H.; Kuo, Y.-L.; Wu, A.-Y.; Chien, W.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T06:31:53Z |
A systematic design approach to the band-tracking packet detector in OFDM-based ultrawideband systems
|
Lai, J.-T.; Wu, A.-Y.; Chen, W.-C.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T06:31:53Z |
Ensemble dependent matrix methodology for probabilistic-based fault-tolerant nanoscale circuit design
|
Rao, H.; Chen, J.; Yu, C.; Ang, W.T.; Wey, I.-C.; Wu, A.-Y.; Zhao, H.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T06:31:53Z |
Joint AGC-equalization algorithm and VLSI architecture for wirelined transceiver designs
|
Lai, J.-T.; Wu, A.-Y.; Lee, C.-H.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T06:31:52Z |
A 0.13μm hardware-efficient probabilistic-based noise-tolerant circuit design and implementation with 24.5dB noise-immunity improvement
|
Wey, I.-C.; Chen, Y.-G.; Yu, C.; Chen, J.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T06:31:52Z |
A 19-mode 8.29mm2 52-mW LDPC decoder chip for IEEE 802.16e system
|
Shih, X.-Y.; Zhan, C.-Z.; Lin, C.-H.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T06:31:52Z |
A clock-fault tolerant architecture and circuit for reliable nanoelectronics system
|
Ang, W.T.; Rao, H.F.; Yu, C.; Liu, J.; Wey, I.-C.; Wu, A.-Y.; Zhao, H.; Chen, J.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T06:22:08Z |
Multilevel LINC system design for wireless transmitters
|
Chen, Y.-J.; Jheng, K.-Y.; Wu, A.-Y.; Tsao, H.-W.; Tzeng, B.; HEN-WAI TSAO; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:59:23Z |
Rapid IP design of variable-length cached-FFT processor for OFDM-based communication systems
|
AN-YEU(ANDY) WU; Wu, A.-Y.; Huang, K.-K.; Lee, Y.-H.; Yu, T.-H. |
| 臺大學術典藏 |
2018-09-10T05:59:23Z |
Ultra low-cost 3.2Gb/s optical-rate reed solomon decoder IC design
|
Hsu, H.-Y.; Yeo, J.-C.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:59:22Z |
A robust band-tracking packet detector (BT-PD) in OFDM-based ultra-wideband systems
|
Lai, J.-T.; Chu, N.-Y.; Wu, A.-Y.; Chen, W.-C.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:59:22Z |
A triple-mode MAP/VA IP design for advanced wireless communication systems
|
Lin, C.-H.; Li, F.-M.; Shi, X.-Y.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:59:22Z |
DSP engine design for LINC wireless transmitter systems
|
Jheng, K.-Y.; Wang, Y.-C.; Wu, A.-Y.; Tsao, H.-W.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:59:22Z |
Multi-symbol-sliced dynamically reconfigurable reed-solomon decoder design based on unified finite-field processing element
|
Hsu, H.-Y.; Yeo, J.-C.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:59:22Z |
On-line MSR-cordic VLSI architecture with applications to cost-efficient rotation-based adaptive filtering systems
|
Yu, T.-H.; Yu, C.-L.; Jheng, K.-Y.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:59:21Z |
A low cost packet detector in OFDM-based ultra-wideband systems
|
Lai, J.-T.; Chu, N.-Y.; Wu, A.-Y.; Chen, W.-C.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:59:21Z |
A Shortened Impulse Response Filter (SIRF) scheme for cost-effective echo canceller design of 10GBase-T ethernet system
|
Hsu, M.-F.; Chen, Y.-L.; Jheng, K.-Y.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:59:21Z |
A new early termination scheme of iterative turbo decoding using decoding threshold
|
Li, F.-M.; Lin, C.-H.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:52:05Z |
DSP engine design for LINC wireless transmitter systems
|
Jheng, K.-Y.; Wang, Y.-C.; Wu, A.-Y.; Tsao, H.-W.; HEN-WAI TSAO |
| 臺大學術典藏 |
2018-09-10T05:24:16Z |
Soft-threshold-based multilayer decision feedback equalizer (STM-DFE) algorithm and VLSI architecture
|
Lin, C.-H.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:24:15Z |
A scalable DCO design for portable ADPLL designs
|
Wu, C.-T.; Wang, W.; Wey, I.-C.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:24:15Z |
Digital signal processing engine design for polar transmitter in wireless communication systems
|
Ko, H.-Y.; Wang, Y.-C.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:24:15Z |
Low cost decision feedback equalizer (DFE) design for giga-bit systems
|
Lin, C.-H.; Wu, A.-Y.; AN-YEU(ANDY) WU |
