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"wu a y"
Showing items 151-160 of 196 (20 Page(s) Totally)
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| 臺大學術典藏 |
2018-09-10T05:59:22Z |
Multi-symbol-sliced dynamically reconfigurable reed-solomon decoder design based on unified finite-field processing element
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Hsu, H.-Y.; Yeo, J.-C.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:59:22Z |
On-line MSR-cordic VLSI architecture with applications to cost-efficient rotation-based adaptive filtering systems
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Yu, T.-H.; Yu, C.-L.; Jheng, K.-Y.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:59:21Z |
A low cost packet detector in OFDM-based ultra-wideband systems
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Lai, J.-T.; Chu, N.-Y.; Wu, A.-Y.; Chen, W.-C.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:59:21Z |
A Shortened Impulse Response Filter (SIRF) scheme for cost-effective echo canceller design of 10GBase-T ethernet system
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Hsu, M.-F.; Chen, Y.-L.; Jheng, K.-Y.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:59:21Z |
A new early termination scheme of iterative turbo decoding using decoding threshold
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Li, F.-M.; Lin, C.-H.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:52:05Z |
DSP engine design for LINC wireless transmitter systems
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Jheng, K.-Y.; Wang, Y.-C.; Wu, A.-Y.; Tsao, H.-W.; HEN-WAI TSAO |
| 臺大學術典藏 |
2018-09-10T05:24:16Z |
Soft-threshold-based multilayer decision feedback equalizer (STM-DFE) algorithm and VLSI architecture
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Lin, C.-H.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:24:15Z |
A scalable DCO design for portable ADPLL designs
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Wu, C.-T.; Wang, W.; Wey, I.-C.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:24:15Z |
Digital signal processing engine design for polar transmitter in wireless communication systems
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Ko, H.-Y.; Wang, Y.-C.; Wu, A.-Y.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2018-09-10T05:24:15Z |
Low cost decision feedback equalizer (DFE) design for giga-bit systems
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Lin, C.-H.; Wu, A.-Y.; AN-YEU(ANDY) WU |
Showing items 151-160 of 196 (20 Page(s) Totally)
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