|
|
Taiwan Academic Institutional Repository >
Browse by Author
|
"wu an yeu"
Showing items 66-90 of 109 (5 Page(s) Totally)
<< < 1 2 3 4 5 > >>
View [10|25|50] records per page
| 國立臺灣大學 |
2004-05 |
Least squares approximation-based ROM-free direct digital frequency synthesizer
|
Wen, Ching-Hua; Hsu, Huai-Yi; Ko, Hung Yang; Wu, An-Yeu |
| 國立臺灣大學 |
2004-05 |
1000BASE-T Gigabit Ethernet baseband DSP IC design
|
Lin, Hsiu-Ping; Chen, Nancy F.; Lai, Jyh-Ting; Wu, An-Yeu |
| 國立臺灣大學 |
2004-05 |
VLSI design of dual-mode Viterbi/turbo decoder for 3GPP
|
Huang, Kai; Li, Fan-Min; Shen, Pei-Ling; Wu, An-Yeu |
| 臺大學術典藏 |
2004-05 |
Least squares approximation-based ROM-free direct digital frequency synthesizer
|
Hsu, Huai-Yi; Ko, Hung Yang; Wu, An-Yeu; Wen, Ching-Hua; Wen, Ching-Hua; Hsu, Huai-Yi; Ko, Hung Yang; Wu, An-Yeu |
| 臺大學術典藏 |
2004-05 |
1000BASE-T Gigabit Ethernet baseband DSP IC design
|
Lin, Hsiu-Ping; Chen, Nancy F.; Lai, Jyh-Ting; Wu, An-Yeu; Lin, Hsiu-Ping; Chen, Nancy F.; Lai, Jyh-Ting; Wu, An-Yeu |
| 臺大學術典藏 |
2004-05 |
VLSI design of dual-mode Viterbi/turbo decoder for 3GPP
|
Huang, Kai; Li, Fan-Min; Shen, Pei-Ling; Wu, An-Yeu; Huang, Kai; Li, Fan-Min; Shen, Pei-Ling; Wu, An-Yeu |
| 國立臺灣大學 |
2004 |
Triple-mode MAP/VA timing analysis for unified convolutional/turbo decoder design
|
Li, Fan-Min; Shen, Pei-Ling; Wu, An-Yeu |
| 國立臺灣大學 |
2004 |
A scalable Reed-Solomon decoding processor based on unified finite-field processing element design
|
Yeo, Jih-Chiang; Hsu, Huai-Yi; Wu, An-Yeu |
| 國立臺灣大學 |
2004 |
Fast Convergent Pipelined Adaptive DFE Architecture Using Post-Cursor Processing Filter Technique
|
Yang, Meng-Da; Wu, An-Yeu; Lai, Jyh-Ting |
| 國立臺灣大學 |
2004 |
High-performance VLSI architecture of adaptive decision feedback equalizer based on predictive parallel branch slicer (PPBS) scheme
|
Yang, Meng-Da; Wu, An-Yeu; Lai, Jyh-Ting |
| 臺大學術典藏 |
2004 |
Triple-mode MAP/VA timing analysis for unified convolutional/turbo decoder design
|
Li, Fan-Min; Shen, Pei-Ling; Wu, An-Yeu; Li, Fan-Min; Shen, Pei-Ling; Wu, An-Yeu |
| 臺大學術典藏 |
2004 |
A scalable Reed-Solomon decoding processor based on unified finite-field processing element design
|
Yeo, Jih-Chiang; Hsu, Huai-Yi; Wu, An-Yeu; Yeo, Jih-Chiang; Hsu, Huai-Yi; Wu, An-Yeu |
| 國立臺灣大學 |
2003-09 |
Dual-mode convolutional/SOVA based turbo code decoder VLSI design for wireless communication systems
|
Chen, Pen-Hsin; Kai-Huang; Hsueh, Nai-Hsuan; Wu, An-Yeu |
| 國立臺灣大學 |
2003-08 |
A novel multipath matrix algorithm for exact room response identification in stereo echo cancellation
|
Lai, Jyh-Ting; Wu, An-Yeu; Yeh, Cheng-Chung |
| 國立臺灣大學 |
2003-05 |
Implementation of a programmable 64/spl sim/2048-point FFT/IFFT processor for OFDM-based communication systems
|
Kuo, Jen-Chih; Wen, Ching-Hua; Wu, An-Yeu |
| 臺大學術典藏 |
2003-05 |
Implementation of a programmable 64/spl sim/2048-point FFT/IFFT processor for OFDM-based communication systems
|
Kuo, Jen-Chih; Wen, Ching-Hua; Wu, An-Yeu; Kuo, Jen-Chih; Wen, Ching-Hua; Wu, An-Yeu |
| 國立臺灣大學 |
2003-04 |
Mixed-scaling-rotation CORDIC (MSR-CORDIC) algorithm and architecture for scaling-free high-performance rotational operations
|
Lin, Zhi-Xiu; Wu, An-Yeu |
| 國立臺灣大學 |
2003-04 |
Angle quantization approach for lattice IIR filter implementation and its trellis de-allocation algorithm
|
Wu, An-Yeu; Lee, I-Hsien; Wu, Cheng-Shing |
| 臺大學術典藏 |
2003-04 |
Mixed-scaling-rotation CORDIC (MSR-CORDIC) algorithm and architecture for scaling-free high-performance rotational operations
|
Lin, Zhi-Xiu; Wu, An-Yeu; Lin, Zhi-Xiu; Wu, An-Yeu |
| 臺大學術典藏 |
2003-04 |
Angle quantization approach for lattice IIR filter implementation and its trellis de-allocation algorithm
|
Wu, An-Yeu; Lee, I-Hsien; Wu, Cheng-Shing; Wu, An-Yeu; Lee, I-Hsien; Wu, Cheng-Shing |
| 國立臺灣大學 |
2003 |
VLSI Design of a Variable-Length FFT/IFFT Processor for OFDM-based Communication Systems
|
Kuo, Jen-Chih; Wen, Ching-Hua; Lin, Chih-Hsiu; Wu, An-Yeu |
| 國立臺灣大學 |
2003 |
A high-performance/low-latency vector rotational CORDIC architecture based on extended elementary angle set and trellis-based searching schemes
|
Wu, Cheng-Shing; Wu, An-Yeu; Lin, Chih-Hsiu |
| 國立臺灣大學 |
2003 |
A Novel Low-Cost Multi-Mode Reed Solomon Decoder Design Based on Peterson-Gorenstein-Zierler Algorithm
|
Hsu, Huai-Yi; Wang, Sheng-Feng; Wu, An-Yeu |
| 國立臺灣大學 |
2003 |
A Novel Echo Cancellation Algorithm and Architecture Based on Multi-Path Adaptive Interpolated FIR Filter
|
Wu, Cheng-Shing; Wu, An-Yeu |
| 臺大學術典藏 |
2003 |
VLSI Design of a Variable-Length FFT/IFFT Processor for OFDM-based Communication Systems
|
Kuo, Jen-Chih; Wen, Ching-Hua; Lin, Chih-Hsiu; Wu, An-Yeu; Kuo, Jen-Chih; Wen, Ching-Hua; Lin, Chih-Hsiu; Wu, An-Yeu |
Showing items 66-90 of 109 (5 Page(s) Totally)
<< < 1 2 3 4 5 > >>
View [10|25|50] records per page
|
