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Showing items 1-6 of 6 (1 Page(s) Totally)
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| 臺大學術典藏 |
2020-05-04T08:08:41Z |
An Evaluation of Misaligned Data Access Handling Mechanisms in Dynamic Binary Translation Systems.
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Li, Jianjun;Wu, Chenggang;Hsu, Wei-Chung; Li, Jianjun; Wu, Chenggang; Hsu, Wei-Chung; WEI-CHUNG HSU |
| 臺大學術典藏 |
2020-05-04T08:08:40Z |
Dynamic register promotion of stack variables.
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Li, Jianjun;Wu, Chenggang;Hsu, Wei-Chung; Li, Jianjun; Wu, Chenggang; Hsu, Wei-Chung; WEI-CHUNG HSU |
| 臺大學術典藏 |
2020-05-04T08:08:37Z |
HSPT: Practical Implementation and Efficient Management of Embedded Shadow Page Tables for Cross-ISA System Virtual Machines.
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Wang, Zhe;Li, Jianjun;Wu, Chenggang;Yang, Dongyan;Wang, Zhenjiang;Hsu, Wei-Chung;Li, Bin;Guan, Yong; Wang, Zhe; Li, Jianjun; Wu, Chenggang; Yang, Dongyan; Wang, Zhenjiang; Hsu, Wei-Chung; Li, Bin; Guan, Yong; WEI-CHUNG HSU |
| 臺大學術典藏 |
2020-05-04T08:08:36Z |
ReRanz: A Light-Weight Virtual Machine to Mitigate Memory Disclosure Attacks.
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Wang, Zhe;Wu, Chenggang;Li, Jianjun;Lai, Yuanming;Zhang, Xiangyu;Hsu, Wei-Chung;Cheng, Yueqiang; Wang, Zhe; Wu, Chenggang; Li, Jianjun; Lai, Yuanming; Zhang, Xiangyu; Hsu, Wei-Chung; Cheng, Yueqiang; WEI-CHUNG HSU |
| 國立交通大學 |
2017-04-21T06:50:07Z |
Dynamic Register Promotion of Stack Variables
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Li, Jianjun; Wu, Chenggang; Hsu, Wei-Chung |
| 國立交通大學 |
2014-12-08T15:30:49Z |
Efficient and Effective Misaligned Data Access Handling in a Dynamic Binary Translation System
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Li, Jianjun; Wu, Chenggang; Hsu, Wei-Chung |
Showing items 1-6 of 6 (1 Page(s) Totally)
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