|
English
|
正體中文
|
简体中文
|
總筆數 :0
|
|
造訪人次 :
51660867
線上人數 :
980
教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
|
|
|
"wu chia hsin"的相關文件
Showing items 26-35 of 39 (4 Page(s) Totally)
<< < 1 2 3 4 > >>
View [10|25|50] records per page
| 國立臺灣大學 |
2005 |
CMOS wideband amplifiers using multiple inductive-series peaking technique
|
Wu, Chia-Hsin; Lee, Chih-Hun; Chen, Wei-Sheng; Liu, Shen-Iuan |
| 國立臺灣大學 |
2005 |
Selective metal parallel shunting inductor and its VCO application
|
Wu, Chia-Hsin; Kuo, Chun-Yi; Liu, Shen-Iuan |
| 國立臺灣大學 |
2004-08 |
A 1.2V, 18mW, 10Gb/s SiGe transimpedance amplifier
|
Lee, Chihun; Wu, Chia-Hsin; Liu, Shen-Iuan |
| 國立臺灣大學 |
2004-05 |
A 1V 4.2mW fully integrated 2.5Gb/s CMOS limiting amplifier using folded active inductors
|
Wu, Chia-Hsin; Liao, Jieh-Wei; Liu, Shen-Iuan |
| 國立臺灣大學 |
2004-02 |
A 2 GHz CMOS variable-gain amplifier with 50 dB linear-in-magnitude controlled gain range for 10GBase-LX4 Ethernet
|
Wu, Chia-Hsin; Liu, Chang-Shun; Liu, Shen-Iuan |
| 國立臺灣大學 |
2004 |
CMOS電感設計及其高速前端電路應用
|
吳家欣; Wu, Chia-Hsin |
| 國立臺灣大學 |
2003-06 |
Selective metal parallel shunting inductor and its VCO application
|
Wu, Chia-Hsin; Kuo, Chun-Yi; Liu, Shen-Iuan |
| 國立臺灣大學 |
2003 |
Analysis of on-chip spiral inductors using the distributed capacitance model
|
Wu, Chia-Hsin; Tang, Chih-Chun; Liu, Shen-Iuan |
| 國立臺灣大學 |
2002-08 |
Analysis of on-chip spiral inductors using the distributed capacitance model
|
Wu, Chia-Hsin; Tang, Chih-Chun; Liu, Shen-Iuan |
| 國立臺灣大學 |
2002-05 |
CMOS 2.4-GHz receiver front end with area-efficient inductors and digitally calibrated 90/spl deg/ delay network
|
Tang, Chih-Chun; Wu, Chia-Hsin; Li, Kun-Hsien; Lee, Tai-Cheng; Liu, Shen-Iuan |
Showing items 26-35 of 39 (4 Page(s) Totally)
<< < 1 2 3 4 > >>
View [10|25|50] records per page
|
