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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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"wu chia ming"的相關文件
顯示項目 16-25 / 29 (共3頁)
<< < 1 2 3 > >>
每頁顯示[10|25|50]項目
| 國立東華大學 |
2009-04 |
Mapping and Scheduling Algorithms for Circuit-Switched Network-on-Chip Architecture
|
Chang,Ruay-Shiung; Wu,Chia Ming; Chi,Hsin Chou |
| 國立東華大學 |
2009-04 |
Mapping and Scheduling for Circuit-Switched Network-on-Chip Architecture
|
Chi,Hsin-Chou; Chang,Ruay-Shiung; Wu,Chia-Ming |
| 國立東華大學 |
2009 |
Identification and characterization of a cytochrome b559 Synechocystis 6803 mutant spontaneously generated from DCMU-inhibited photoheterotrophical growth conditions
|
Chiu, Yi-Fang; Lin Wen-Ching; Wu Chia-Ming; Chen Yung-Han; Hung Chung-Hsien; Ke Shyue-Chu; Chu Hsiu-An |
| 國立高雄第一科技大學 |
2008-07-22 |
重要性鏈結連接要素分析編碼法於影像壓縮之研究
|
吳家銘; Wu Chia-ming |
| 國立東華大學 |
2008-01 |
Integrated Mapping and Scheduling for Circuit-Switched Network-on-Chip Architectures
|
Chi,Hsin-Chou; Wu,Chia-Ming; Lee,Jun-Hui |
| 國立東華大學 |
2007-10 |
A High-Performance Programmable Scheduling Engine for ATM Switches
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Chi,Hsin-Chou; Wu,Chia-Ming; Wu,Kuo-Yao |
| 國立東華大學 |
2007-07 |
Design and Implementation of Fair Queueing Algorithms for Packet Switches
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Chi,Hsin-Chou; Hsu,Wen-Pin; Wu,Chia-Ming |
| 國立東華大學 |
2006-10 |
An Efficient Scheduler for Circuit-Switched Network-on-Chip Architectures
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Chi,Hsin-Chou; Wu,Chia-Ming |
| 國立東華大學 |
2006-06 |
A Wrapper for Low-Power Error-Correcting Data Delivery in On-Chip Networks
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Chi,Hsin-Chou; Huang,Ying-Ming; Wu,Chia-Ming |
| 國立東華大學 |
2006-04 |
A Switch Supporting Circuit and Packet Switching for On-Chip Networks
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Chi,Hsin-Chou; Wu,Chia-Ming; Wu,Sung-Tze |
顯示項目 16-25 / 29 (共3頁)
<< < 1 2 3 > >>
每頁顯示[10|25|50]項目
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