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Showing items 1-7 of 7 (1 Page(s) Totally)
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| 國立臺灣大學 |
2010 |
可攜式全數位鎖相迴路電路設計與實現
|
吳嘉村; Wu, Chia-Tsun |
| 國立臺灣大學 |
2006-05 |
A portable all-digital pulsewidth control loop for SOC applications
|
Wang, Wei; Wey, I-Chyn; Wu, Chia-Tsun; Wu, An-Yeu |
| 國立臺灣大學 |
2006-05 |
A frequency estimation algorithm for ADPLL designs with two-cycle lock-in time
|
Wu, Chia-Tsun; Wang, Wei; Wey, I-Chyn; Wu, An-Yeu |
| 臺大學術典藏 |
2006-05 |
A portable all-digital pulsewidth control loop for SOC applications
|
Wang, Wei; Wey, I-Chyn; Wu, Chia-Tsun; Wu, An-Yeu; Wang, Wei; Wey, I-Chyn; Wu, Chia-Tsun; Wu, An-Yeu |
| 臺大學術典藏 |
2006-05 |
A frequency estimation algorithm for ADPLL designs with two-cycle lock-in time
|
Wu, Chia-Tsun; Wang, Wei; Wey, I-Chyn; Wu, An-Yeu; Wu, Chia-Tsun; Wang, Wei; Wey, I-Chyn; Wu, An-Yeu |
| 國立臺灣大學 |
2005-07 |
A high speed scalable shift-register based on-chip serial communication design for SoC applications
|
Wey, I-Chyn; Chen, You-Gang; Wu, Chia-Tsun; Wang, Wei; Wu, An-Yeu |
| 國立臺灣大學 |
2005-05 |
A scalable DCO design for portable ADPLL designs
|
Wu, Chia-Tsun; Wang, Wei; Wey, I-Chyn; Wu, An-Yeu |
Showing items 1-7 of 7 (1 Page(s) Totally)
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