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Showing items 1-10 of 63 (7 Page(s) Totally)
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| 朝陽科技大學 |
2025-02-27 |
The Research of Optimal Interior Design Considering Inter-personal Networks, Factor Weightage, Affected Period, and External Conditions
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WU, CHIEN-HUNG; 吳建鋐 |
| 朝陽科技大學 |
2024-08-14 |
The Detection and Calculation of Design-Weighting on Indoor Environmental Elements—Illustrated by Real Interior Design Projects
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郭其綱;吳建鋐; Kuo, Chyi-Gang; Wu, Chien-Hung |
| 朝陽科技大學 |
2023-12-02 |
Detection and Definition of the Influence Weight of Indoor Environmental Factors(初稿)
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Kuo, Chyi-Gang;Wu, Chien-Hung; 郭其綱 |
| 國立交通大學 |
2020-03-02T03:23:28Z |
Effects of P-Type SnOx Thin-Film Transistors with N-2 and O-2 Ambient Furnace Annealing
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Zhang, Yu-Xin; Wu, Chien-Hung; Chang, Kow-Ming; Chen, Yi-Ming; Xu, Ni; Tsai, Kai-Chien |
| 國立交通大學 |
2020-03-02T03:23:28Z |
Reliability of Atmosphere Pressure-Plasma Enhanced Chemical Vapor Deposition Deposited Indium Gallium Zinc Oxide Resistive Random Access Memory Device with Microwave Annealing
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Wu, Chien-Hung; Kuo, Song-Nian; Chang, Kow-Ming; Chen, Yi-Ming; Zhang, Yu-Xin; Xu, Ni; Liu, Wu-Yang; Chin, Albert |
| 國立交通大學 |
2020-03-02T03:23:28Z |
Study of Atmospheric-Pressure Plasma Enhanced Chemical Vapor Deposition Fabricated Indium Gallium Zinc Oxide Thin Film Transistors with In-Situ Hydrogen Plasma Treatment
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Chen, Yi-Ming; Wu, Chien-Hung; Chang, Kow-Ming; Zhang, Yu-Xin; Xu, Ni; Yu, Tsung-Ying; Chin, Albert |
| 國立交通大學 |
2020-03-02T03:23:28Z |
Investigation of Microwave Annealing on Resistive Random Access Memory Device with Atmospheric Pressure Plasma Enhanced Chemical Vapor Deposition Deposited IGZO Layer
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Wu, Chien-Hung; Kuo, Song-Nian; Chang, Kow-Ming; Chen, Yi-Ming; Zhang, Yu-Xin; Xu, Ni; Liu, Wu-Yang; Chin, Albert |
| 國立交通大學 |
2019-04-03T06:38:41Z |
Improving Crystalline Silicon Solar Cell Efficiency Using Graded-Refractive-Index SiON/ZnO Nanostructures
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Tu, Yung-Chun; Wang, Shui-Jinn; Wu, Chien-Hung; Chang, Kow-Ming; Lin, Tseng-Hsing; Hung, Chien-Hsiung; Wu, Jhen-Siang |
| 國立交通大學 |
2019-04-02T06:04:44Z |
Study of low-temperature and post-stress hysteresis in high-k gate dielectrics
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Wu, You-Lin; Lin, Shi-Tin; Yang, Chang Cheng; Wu, Chien-Hung; Chin, Albert |
| 國立交通大學 |
2019-04-02T05:58:46Z |
Iridium Nanocrystal Thin-Film Transistor Nonvolatile Memory with Si3N4/SiO2 Stack of Asymmetric Tunnel Barrier
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Wang, Terry Tai-Jui; Lu, Tien-Lin; Wu, Chien-Hung; Liu, Yu-Cheng; Hung, Shih-Wei; Hsieh, Ing-Jar; Kuo, Cheng-Tzu |
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