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Showing items 396-420 of 607  (25 Page(s) Totally)
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Institution Date Title Author
國立交通大學 2014-12-08T15:03:22Z CMOS CURRENT-MODE IMPLEMENTATION OF SPATIOTEMPORAL PROBABILISTIC NEURAL NETWORKS FOR SPEECH RECOGNITION WU, CY; LIU, RY; JOU, IC
國立交通大學 2014-12-08T15:03:20Z MODELING THE POSITIVE-FEEDBACK REGENERATIVE PROCESS OF CMOS LATCHUP BY A POSITIVE TRANSIENT POLE METHOD .1. THEORETICAL DERIVATION KER, MD; WU, CY
國立交通大學 2014-12-08T15:03:20Z MODELING THE POSITIVE-FEEDBACK REGENERATIVE PROCESS OF CMOS LATCHUP BY A POSITIVE TRANSIENT POLE METHOD .2. QUANTITATIVE-EVALUATION KER, MD; WU, CY
國立交通大學 2014-12-08T15:03:17Z A NEW CONSTANT-FIELD SCALING THEORY FOR MOSFETS MAA, JJ; WU, CY
國立交通大學 2014-12-08T15:03:16Z COMPLEMENTARY-SCR ESD PROTECTION CIRCUIT WITH INTERDIGITATED FINGER-TYPE LAYOUT FOR INPUT PADS OF SUBMICRON CMOS ICS KER, MD; WU, CY
國立交通大學 2014-12-08T15:03:16Z A SIMPLE AND ACCURATE SIMULATION TECHNIQUE FOR FLASH EEPROM WRITING AND ITS RELIABILITY ISSUE WEN, KS; WU, CY
國立交通大學 2014-12-08T15:03:14Z A NEW SIMPLIFIED THRESHOLD-VOLTAGE MODEL FOR N-MOSFETS WITH NONUNIFORMLY DOPED SUBSTRATE AND ITS APPLICATION TO MOSFETS MINIATURIZATION MAA, JJ; WU, CY
國立交通大學 2014-12-08T15:03:14Z A NEW STRUCTURE OF THE 2-D SILICON RETINA WU, CY; CHIU, CF
國立交通大學 2014-12-08T15:03:12Z A CMOS CURRENT-MODE DESIGN OF MODIFIED LEARNING-VECTOR-QUANTIZATION NEURAL NETWORKS LIU, RY; WU, CY; JOU, IC
國立交通大學 2014-12-08T15:03:01Z A 2-D ANALYTIC MODEL FOR THE THRESHOLD-VOLTAGE OF FULLY DEPLETED SHORT GATE-LENGTH SI-SOI MESFETS HOU, CS; WU, CY
國立交通大學 2014-12-08T15:02:57Z Synthesis of novel triacetal oxa-cage compounds Wu, HJ; Wu, CY; Lin, CC
國立交通大學 2014-12-08T15:02:54Z Analog electronic cochlea design using multiplexing switched-capacitor circuits Bor, JC; Wu, CY
國立交通大學 2014-12-08T15:02:54Z CMOS current-mode neural associative memory design with on-chip learning Wu, CY; Lan, JF
國立交通大學 2014-12-08T15:02:49Z A novel method for extracting the metallurgical channel length of MOSFET's using a single device Li, HH; Chu, YL; Wu, CY
國立交通大學 2014-12-08T15:02:48Z A design strategy for short gate length SOI MESFETs Hou, CS; Wu, CY
國立交通大學 2014-12-08T15:02:45Z Synthesis of novel triacetal trioxa-cage compounds by ozonolysis of bicyclo[2.2.1]heptenes and bicyclo[2.2.2]octenes Wu, CY; Lin, CC; Lai, MC; Wu, HJ
國立交通大學 2014-12-08T15:02:44Z Complementary-LVTSCR ESD protection circuit for submicron CMOS VLSI/ULSI Ker, MD; Wu, CY; Chang, HH
國立交通大學 2014-12-08T15:02:42Z Design techniques for VHF/UHF high-Q tunable bandpass filters using simple CMOS inverter-based transresistance amplifiers Lu, PH; Wu, CY; Tsai, MK
國立交通大學 2014-12-08T15:02:40Z A novel two-step etching process for reducing plasma-induced oxide damage You, KF; Wu, CY
國立交通大學 2014-12-08T15:02:40Z The design of CMOS continuous-time VHF current and voltage-mode lowpass filters with Q-enhancement circuits Wu, CY; Hsu, HS
國立交通大學 2014-12-08T15:02:37Z A new extraction algorithm for the metallurgical channel length of conventional and LDD MOSFET's Jean, YS; Wu, CY
國立交通大學 2014-12-08T15:02:35Z Synthesis of tetraacetal tetraoxa-cage compounds with alkyl substituents at different sites of the oxa-cage skeleton Lin, RL; Wu, CY; Chern, JH; Wu, HJ
國立交通大學 2014-12-08T15:02:27Z A CMOS ratio-independent and gain-insensitive algorithmic analog-to-digital converter Chin, SY; Wu, CY
國立交通大學 2014-12-08T15:02:23Z Capacitor-couple ESD protection circuit for deep-submicron low-voltage CMOS ASIC Ker, MD; Wu, CY; Cheng, T; Chang, HH
國立交通大學 2014-12-08T15:02:13Z Low-temperature characteristics of well-type guard rings in epitaxial CMOS Huang, CY; Chen, MJ; Jeng, JK; Wu, CY

Showing items 396-420 of 607  (25 Page(s) Totally)
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