|
"wu cy"的相关文件
显示项目 386-435 / 607 (共13页) << < 3 4 5 6 7 8 9 10 11 12 > >> 每页显示[10|25|50]项目
| 國立交通大學 |
2014-12-08T15:03:43Z |
A 10-B 225-MHZ CMOS DIGITAL-TO-ANALOG CONVERTER (DAC) WITH THRESHOLD-VOLTAGE COMPENSATED CURRENT SOURCES
|
CHIN, SY; WU, CY |
| 國立交通大學 |
2014-12-08T15:03:41Z |
REALIZATIONS OF HIGH-ORDER SWITCHED-CAPACITOR FILTERS USING MULTIPLEXING TECHNIQUE
|
WU, CY; BOR, JC; JENG, BS |
| 國立交通大學 |
2014-12-08T15:03:37Z |
THE EFFECTS OF IMPURITY BANDS ON THE ELECTRICAL CHARACTERISTICS OF METAL-SEMICONDUCTOR OHMIC CONTACTS
|
LOU, YS; WU, CY |
| 國立交通大學 |
2014-12-08T15:03:37Z |
NEW DESIGN TECHNIQUES FOR A COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR CURRENT READOUT INTEGRATED-CIRCUIT FOR INFRARED DETECTOR ARRAYS
|
WU, CY; HSIEH, CC |
| 國立交通大學 |
2014-12-08T15:03:36Z |
A LOW GLITCH 10-BIT 75-MHZ CMOS VIDEO D/A CONVERTER
|
WU, TY; JIH, CT; CHEN, JC; WU, CY |
| 國立交通大學 |
2014-12-08T15:03:36Z |
PRECISE CMOS CURRENT SAMPLE HOLD CIRCUITS USING DIFFERENTIAL CLOCK FEEDTHROUGH ATTENUATION TECHNIQUES
|
WU, CY; CHEN, CC; CHO, JJ |
| 國立交通大學 |
2014-12-08T15:03:30Z |
LATERAL TITANIUM SILICIDE GROWTH AND ITS SUPPRESSION USING THE A-SI/TI BILAYER STRUCTURE
|
LOU, YS; WU, CY |
| 國立交通大學 |
2014-12-08T15:03:27Z |
A NEW GATE CURRENT SIMULATION TECHNIQUE CONSIDERING SI/SIO2 INTERFACE-TRAP GENERATION
|
WEN, KS; LI, HH; WU, CY |
| 國立交通大學 |
2014-12-08T15:03:25Z |
A NOVEL EXTRACTION TECHNIQUE FOR THE EFFECTIVE CHANNEL-LENGTH OF MOSFET DEVICES
|
LI, HH; WU, CY |
| 國立交通大學 |
2014-12-08T15:03:24Z |
A CMOS TRANSISTOR-ONLY 8-B 4.5-MS/S PIPELINED ANALOG-TO-DIGITAL CONVERTER USING FULLY-DIFFERENTIAL CURRENT-MODE CIRCUIT TECHNIQUES
|
WU, CY; CHEN, CC; CHO, JJ |
| 國立交通大學 |
2014-12-08T15:03:22Z |
CMOS CURRENT-MODE IMPLEMENTATION OF SPATIOTEMPORAL PROBABILISTIC NEURAL NETWORKS FOR SPEECH RECOGNITION
|
WU, CY; LIU, RY; JOU, IC |
| 國立交通大學 |
2014-12-08T15:03:20Z |
MODELING THE POSITIVE-FEEDBACK REGENERATIVE PROCESS OF CMOS LATCHUP BY A POSITIVE TRANSIENT POLE METHOD .1. THEORETICAL DERIVATION
|
KER, MD; WU, CY |
| 國立交通大學 |
2014-12-08T15:03:20Z |
MODELING THE POSITIVE-FEEDBACK REGENERATIVE PROCESS OF CMOS LATCHUP BY A POSITIVE TRANSIENT POLE METHOD .2. QUANTITATIVE-EVALUATION
|
KER, MD; WU, CY |
| 國立交通大學 |
2014-12-08T15:03:17Z |
A NEW CONSTANT-FIELD SCALING THEORY FOR MOSFETS
|
MAA, JJ; WU, CY |
| 國立交通大學 |
2014-12-08T15:03:16Z |
COMPLEMENTARY-SCR ESD PROTECTION CIRCUIT WITH INTERDIGITATED FINGER-TYPE LAYOUT FOR INPUT PADS OF SUBMICRON CMOS ICS
|
KER, MD; WU, CY |
| 國立交通大學 |
2014-12-08T15:03:16Z |
A SIMPLE AND ACCURATE SIMULATION TECHNIQUE FOR FLASH EEPROM WRITING AND ITS RELIABILITY ISSUE
|
WEN, KS; WU, CY |
| 國立交通大學 |
2014-12-08T15:03:14Z |
A NEW SIMPLIFIED THRESHOLD-VOLTAGE MODEL FOR N-MOSFETS WITH NONUNIFORMLY DOPED SUBSTRATE AND ITS APPLICATION TO MOSFETS MINIATURIZATION
|
MAA, JJ; WU, CY |
| 國立交通大學 |
2014-12-08T15:03:14Z |
A NEW STRUCTURE OF THE 2-D SILICON RETINA
|
WU, CY; CHIU, CF |
| 國立交通大學 |
2014-12-08T15:03:12Z |
A CMOS CURRENT-MODE DESIGN OF MODIFIED LEARNING-VECTOR-QUANTIZATION NEURAL NETWORKS
|
LIU, RY; WU, CY; JOU, IC |
| 國立交通大學 |
2014-12-08T15:03:01Z |
A 2-D ANALYTIC MODEL FOR THE THRESHOLD-VOLTAGE OF FULLY DEPLETED SHORT GATE-LENGTH SI-SOI MESFETS
|
HOU, CS; WU, CY |
| 國立交通大學 |
2014-12-08T15:02:57Z |
Synthesis of novel triacetal oxa-cage compounds
|
Wu, HJ; Wu, CY; Lin, CC |
| 國立交通大學 |
2014-12-08T15:02:54Z |
Analog electronic cochlea design using multiplexing switched-capacitor circuits
|
Bor, JC; Wu, CY |
| 國立交通大學 |
2014-12-08T15:02:54Z |
CMOS current-mode neural associative memory design with on-chip learning
|
Wu, CY; Lan, JF |
| 國立交通大學 |
2014-12-08T15:02:49Z |
A novel method for extracting the metallurgical channel length of MOSFET's using a single device
|
Li, HH; Chu, YL; Wu, CY |
| 國立交通大學 |
2014-12-08T15:02:48Z |
A design strategy for short gate length SOI MESFETs
|
Hou, CS; Wu, CY |
| 國立交通大學 |
2014-12-08T15:02:45Z |
Synthesis of novel triacetal trioxa-cage compounds by ozonolysis of bicyclo[2.2.1]heptenes and bicyclo[2.2.2]octenes
|
Wu, CY; Lin, CC; Lai, MC; Wu, HJ |
| 國立交通大學 |
2014-12-08T15:02:44Z |
Complementary-LVTSCR ESD protection circuit for submicron CMOS VLSI/ULSI
|
Ker, MD; Wu, CY; Chang, HH |
| 國立交通大學 |
2014-12-08T15:02:42Z |
Design techniques for VHF/UHF high-Q tunable bandpass filters using simple CMOS inverter-based transresistance amplifiers
|
Lu, PH; Wu, CY; Tsai, MK |
| 國立交通大學 |
2014-12-08T15:02:40Z |
A novel two-step etching process for reducing plasma-induced oxide damage
|
You, KF; Wu, CY |
| 國立交通大學 |
2014-12-08T15:02:40Z |
The design of CMOS continuous-time VHF current and voltage-mode lowpass filters with Q-enhancement circuits
|
Wu, CY; Hsu, HS |
| 國立交通大學 |
2014-12-08T15:02:37Z |
A new extraction algorithm for the metallurgical channel length of conventional and LDD MOSFET's
|
Jean, YS; Wu, CY |
| 國立交通大學 |
2014-12-08T15:02:35Z |
Synthesis of tetraacetal tetraoxa-cage compounds with alkyl substituents at different sites of the oxa-cage skeleton
|
Lin, RL; Wu, CY; Chern, JH; Wu, HJ |
| 國立交通大學 |
2014-12-08T15:02:27Z |
A CMOS ratio-independent and gain-insensitive algorithmic analog-to-digital converter
|
Chin, SY; Wu, CY |
| 國立交通大學 |
2014-12-08T15:02:23Z |
Capacitor-couple ESD protection circuit for deep-submicron low-voltage CMOS ASIC
|
Ker, MD; Wu, CY; Cheng, T; Chang, HH |
| 國立交通大學 |
2014-12-08T15:02:13Z |
Low-temperature characteristics of well-type guard rings in epitaxial CMOS
|
Huang, CY; Chen, MJ; Jeng, JK; Wu, CY |
| 國立交通大學 |
2014-12-08T15:02:06Z |
A gate-coupled PTLSCR/NTLSCR ESD protection circuit for deep-submicron low-voltage CMOS IC's
|
Ker, MD; Chang, HH; Wu, CY |
| 國立交通大學 |
2014-12-08T15:02:01Z |
The design of a 3-V 900-MHz CMOS bandpass amplifier
|
Wu, CY; Hsiao, SY |
| 國立交通大學 |
2014-12-08T15:02:00Z |
Ozonolysis of 2-endo-7-anti-diacylnorbornenes. A new entry for the synthesis of 2,4,6,13-tetraoxapentacyclo[5.5.1.0(3,11).0(5,9).0(8,12)]tridecanes
|
Wu, HJ; Chern, JH; Wu, CY |
| 國立交通大學 |
2014-12-08T15:01:56Z |
The threshold-voltage model of MOSFET devices with localized interface charge
|
Jean, YS; Wu, CY |
| 國立交通大學 |
2014-12-08T15:01:54Z |
The design of rotation-invariant pattern recognition using the silicon retina
|
Chiu, CF; Wu, CY |
| 國立交通大學 |
2014-12-08T15:01:51Z |
The pentaoxa[5] peristylanes. A novel oxa-cage system
|
Wu, HJ; Wu, CY |
| 國立交通大學 |
2014-12-08T15:01:47Z |
A novel charge-pumping method for extracting the lateral distributions of interface-trap and effective oxide-trapped charge densities in MOSFET devices
|
Li, HH; Chu, YL; Wu, CY |
| 國立交通大學 |
2014-12-08T15:01:34Z |
Special issue on multimedia technology, systems, and applications - Guest editorial
|
Sheu, BJ; Ghanbari, M; Lin, HD; Wu, CY |
| 國立交通大學 |
2014-12-08T15:01:32Z |
Focal-plane-arrays and CMOS readout techniques of infrared imaging systems
|
Hsieh, CC; Wu, CY; Jih, FW; Sun, TP |
| 國立交通大學 |
2014-12-08T15:01:32Z |
A new cryogenic CMOS readout structure for infrared focal plane array
|
Hsieh, CC; Wu, CY; Sun, TP |
| 國立交通大學 |
2014-12-08T15:01:18Z |
A new method for extracting the channel-length reduction and the gate-voltage-dependent series resistance of counter-implanted p-MOSFET's
|
Wu, CM; Wu, CY |
| 國立交通大學 |
2014-12-08T15:01:18Z |
A new method for extracting the counter-implanted channel profile of enhancement-mode p-MOSFET's
|
Wu, CM; Wu, CY |
| 國立交通大學 |
2014-12-08T15:01:16Z |
Synthesis of 3,11-dioxatetracyclo[6.3.0.0(2,6).0(5,9)]undecanes and 3,5,7-trioxapentacyclo[7.2.1.0(2,8).0(4,11).0(6,10)]dodecane
|
Lin, HC; Wu, CY; Wu, HJ |
| 國立交通大學 |
2014-12-08T15:01:09Z |
A novel modeling technique for efficiently computing 3-D capacitances of VLSI multilevel interconnections BFEM
|
Hou, HM; Sheen, CS; Wu, CY |
| 國立交通大學 |
2014-12-08T15:01:09Z |
A new simulation model for plasma ashing process-induced oxide degradation in MOSFET
|
You, KF; Chang, MC; Wu, CY |
显示项目 386-435 / 607 (共13页) << < 3 4 5 6 7 8 9 10 11 12 > >> 每页显示[10|25|50]项目
|