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"wu cy"
Showing items 286-335 of 607 (13 Page(s) Totally)
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| 國立交通大學 |
2014-12-08T15:06:22Z |
A HIGH-DENSITY MOS STATIC RAM CELL USING THE LAMBDA BIPOLAR-TRANSISTOR
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WU, CY; LIU, YF |
| 國立交通大學 |
2014-12-08T15:06:21Z |
A NEW HIGH-POWER VOLTAGE-CONTROLLED DIFFERENTIAL NEGATIVE-RESISTANCE DEVICE - THE LAMBDA-BIPOLAR POWER TRANSISTOR
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WU, CY; LEE, CS |
| 國立交通大學 |
2014-12-08T15:06:21Z |
THE EFFECT OF THE MINORITY-CARRIER DISTRIBUTION ON THE THRESHOLD VOLTAGE OF A MOSFET
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WU, CY; CHIEN, HC |
| 國立交通大學 |
2014-12-08T15:06:20Z |
A NEW INTERNAL OVERVOLTAGE PROTECTION STRUCTURE FOR THE BIPOLAR POWER TRANSISTOR
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WU, CY |
| 國立交通大學 |
2014-12-08T15:06:19Z |
A NEW DYNAMIC RANDOM-ACCESS MEMORY CELL USING A BIPOLAR MOS COMPOSITE STRUCTURE
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WU, CY |
| 國立交通大學 |
2014-12-08T15:06:19Z |
A NEW COMPUTER-AIDED SIMULATION-MODEL FOR POLYCRYSTALLINE SILICON FILM RESISTORS
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WU, CY; KEN, WD |
| 國立交通大學 |
2014-12-08T15:06:17Z |
AN ANALYTIC AND ACCURATE MODEL FOR THE THRESHOLD VOLTAGE OF SHORT CHANNEL MOSFETS IN VLSI
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WU, CY; YANG, SY; CHEN, HH; TSENG, FC; SHIH, CT |
| 國立交通大學 |
2014-12-08T15:06:16Z |
THE METAL-INSULATOR-SEMICONDUCTOR-SWITCH (MISS) DEVICE USING THERMAL NITRIDE FILM AS THE TUNNELING INSULATOR
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WU, CY; HUANG, YT |
| 國立交通大學 |
2014-12-08T15:06:15Z |
AN EFFICIENT TIMING MODEL FOR CMOS COMBINATIONAL LOGIC GATES
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WU, CY; HWANG, JS; CHANG, C; CHANG, CC |
| 國立交通大學 |
2014-12-08T15:06:15Z |
A NEW APPROACH TO MODEL CMOS LATCHUP
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WU, CY; YANG, YH; CHANG, C; CHANG, CC |
| 國立交通大學 |
2014-12-08T15:06:15Z |
A SIMPLE PUNCHTHROUGH VOLTAGE MODEL FOR SHORT-CHANNEL MOSFETS WITH SINGLE CHANNEL IMPLANTATION IN VLSI
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WU, CY; HSIAO, WZ; CHEN, HH |
| 國立交通大學 |
2014-12-08T15:06:15Z |
A NEW METHOD FOR COMPUTER-AIDED OPTIMIZATION OF SOLAR-CELL STRUCTURES
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CHEN, MJ; WU, CY |
| 國立交通大學 |
2014-12-08T15:06:15Z |
A STRUCTURE-ORIENTED MODEL FOR DETERMINING THE SUBSTRATE SPREADING RESISTANCE IN BULK CMOS LATCH-UP PATHS AND ITS APPLICATION IN HOLDING CURRENT PREDICTION
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CHEN, MJ; WU, CY |
| 國立交通大學 |
2014-12-08T15:06:13Z |
THE LAMBDA-BIPOLAR PHOTOTRANSISTOR ANALYSIS AND APPLICATIONS
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WU, CY; SHENG, HD; TSAI, YT |
| 國立交通大學 |
2014-12-08T15:06:13Z |
AN ACCURATE AND ANALYTIC THRESHOLD-VOLTAGE MODEL FOR SMALL-GEOMETRY MOSFETS WITH SINGLE-CHANNEL ION-IMPLANTATION IN VLSI
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WU, CY; HUANG, GS; CHEN, HH; TSENG, FC; SHIH, CT |
| 國立交通大學 |
2014-12-08T15:06:13Z |
AN ACCURATE MOBILITY MODEL FOR THE I-V-CHARACTERISTICS OF N-CHANNEL ENHANCEMENT-MODE MOSFETS WITH SINGLE-CHANNEL BORON IMPLANTATION
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WU, CY; DAIH, YW |
| 國立交通大學 |
2014-12-08T15:06:13Z |
A NEW THRESHOLD-VOLTAGE MODEL FOR SMALL-GEOMETRY BURIED-CHANNEL MOSFETS
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WU, CY; HSU, KC |
| 國立交通大學 |
2014-12-08T15:06:13Z |
MOBILITY MODELS FOR THE IV CHARACTERISTICS OF BURIED-CHANNEL MOSFETS
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WU, CY; HSU, KC |
| 國立交通大學 |
2014-12-08T15:06:12Z |
SUPERIOR CHARACTERISTICS OF NITRIDIZED THERMAL OXIDE GROWN ON POLYCRYSTALLINE SILICON
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CHEN, CF; WU, CY |
| 國立交通大學 |
2014-12-08T15:06:11Z |
AN EFFICIENT METHOD FOR CALCULATING THE DC TRIGGERING CURRENTS IN CMOS LATCH-UP
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CHEN, MJ; WU, CY |
| 國立交通大學 |
2014-12-08T15:06:11Z |
A NEW ANALYTICAL 3-DIMENSIONAL MODEL FOR SUBSTRATE RESISTANCE IN CMOS LATCHUP STRUCTURES
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CHEN, MJ; WU, CY |
| 國立交通大學 |
2014-12-08T15:06:11Z |
AN ANALYTIC THRESHOLD-VOLTAGE MODEL FOR SHORT-CHANNEL ENHANCEMENT MODE N-CHANNEL MOSFETS WITH DOUBLE BORON CHANNEL IMPLANTATION
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WU, CY; HUANG, GS; CHEN, HH |
| 國立交通大學 |
2014-12-08T15:06:11Z |
AN EFFICIENT TWO-DIMENSIONAL MODEL FOR CMOS LATCHUP ANALYSIS
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CHEN, MJ; WU, CY |
| 國立交通大學 |
2014-12-08T15:06:09Z |
AN ENVIRONMENT-INSENSITIVE TRILAYER STRUCTURE FOR TITANIUM SILICIDE FORMATION
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LIN, MZ; YU, YCS; WU, CY |
| 國立交通大學 |
2014-12-08T15:06:09Z |
A CHARACTERIZATION MODEL FOR RAMP-VOLTAGE-STRESSED IV CHARACTERISTICS OF THIN THERMAL OXIDES GROWN ON SILICON SUBSTRATE
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CHEN, CF; WU, CY |
| 國立交通大學 |
2014-12-08T15:06:09Z |
CORRELATIONS BETWEEN CMOS LATCH-UP CHARACTERISTICS AND SUBSTRATE STRUCTURE PARAMETERS
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CHEN, MJ; WU, CY |
| 國立交通大學 |
2014-12-08T15:06:08Z |
A NEW OXIDATION-RESISTANT SELF-ALIGNED TISI2 PROCESS
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TSENG, HH; WU, CY |
| 國立交通大學 |
2014-12-08T15:06:07Z |
A CHARACTERIZATION MODEL FOR CONSTANT CURRENT STRESSED VOLTAGE-TIME CHARACTERISTICS OF THIN THERMAL OXIDES GROWN ON SILICON SUBSTRATE
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CHEN, CF; WU, CY |
| 國立交通大學 |
2014-12-08T15:06:06Z |
THE ANALYSIS AND DESIGN OF CMOS MULTIDRAIN LOGIC AND STACKED MULTIDRAIN LOGIC
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WU, CY; WANG, JS; TSAI, MK |
| 國立交通大學 |
2014-12-08T15:06:06Z |
A SIMPLE TECHNIQUE FOR MEASURING THE INTERFACE-STATE DENSITY OF THE SCHOTTKY-BARRIER DIODES USING THE CURRENT-VOLTAGE CHARACTERISTICS
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TSENG, HH; WU, CY |
| 國立交通大學 |
2014-12-08T15:06:05Z |
THE DISTORTION OF THE INTERFACE-STATE SPECTRUM DUE TO NONEQUILIBRIUM OCCUPANCY OF THE INTERFACE STATES AT THE METAL-SEMICONDUCTOR INTERFACE
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TSENG, HH; WU, CY |
| 國立交通大學 |
2014-12-08T15:06:05Z |
THE EFFECTS OF THERMAL NITRIDATION CONDITIONS ON THE RELIABILITY OF THIN NITRIDED OXIDE-FILMS
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TSAI, HH; WU, LC; WU, CY; HU, CM |
| 國立交通大學 |
2014-12-08T15:06:05Z |
A NEW STRUCTURE-ORIENTED MODEL FOR WELL RESISTANCE IN CMOS LATCHUP STRUCTURES
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CHEN, MJ; SZE, SC; CHEN, HH; WU, CY |
| 國立交通大學 |
2014-12-08T15:06:05Z |
A SIMPLE INTERFACIAL-LAYER MODEL FOR THE NONIDEAL IV AND C-V CHARACTERISTICS OF THE SCHOTTKY-BARRIER DIODE
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TSENG, HH; WU, CY |
| 國立交通大學 |
2014-12-08T15:06:04Z |
AN ANALYTIC IV MODEL FOR LIGHTLY DOPED DRAIN (LDD) MOSFET DEVICES
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HUANG, GS; WU, CY |
| 國立交通大學 |
2014-12-08T15:06:04Z |
SUPERIOR CHARACTERISTICS OF THERMAL OXIDE LAYERS GROWN ON AMORPHOUS-SILICON FILMS
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WU, CY; CHEN, CF |
| 國立交通大學 |
2014-12-08T15:06:03Z |
A NEW APPROACH TO ANALYTICALLY SOLVING THE TWO-DIMENSIONAL POISSON EQUATION AND ITS APPLICATION IN SHORT-CHANNEL MOSFET MODELING
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LIN, PS; WU, CY |
| 國立交通大學 |
2014-12-08T15:06:03Z |
A SIMPLIFIED COMPUTER-ANALYSIS FOR NORMAL-WELL GUARD RING EFFICIENCY IN CMOS CIRCUITS
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CHEN, MJ; WU, CY |
| 國立交通大學 |
2014-12-08T15:06:03Z |
THE DIELECTRIC RELIABILITY OF INTRINSIC THIN SIO2-FILMS THERMALLY GROWN ON A HEAVILY DOPED SI SUBSTRATE - CHARACTERIZATION AND MODELING
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CHEN, CF; WU, CY; LEE, MK; CHEN, CN |
| 國立交通大學 |
2014-12-08T15:06:03Z |
TRANSPORT-PROPERTIES OF THERMAL OXIDE-FILMS GROWN ON POLYCRYSTALLINE SILICON - MODELING AND EXPERIMENTS
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WU, CY; CHEN, CF |
| 國立交通大學 |
2014-12-08T15:06:01Z |
THE EFFECTS OF THERMAL SILICIDATION ON THE CURRENT TRANSPORT CHARACTERISTICS OF TI/(111)SI SCHOTTKY-BARRIER CONTACTS
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TSENG, HH; WU, CY |
| 國立交通大學 |
2014-12-08T15:06:00Z |
A NEW METHOD FOR DETERMINING THE TERMINAL SERIES RESISTANCES AND HIGH-INJECTION COEFFICIENT OF BIPOLAR-TRANSISTORS IN CMOS INTEGRATED-CIRCUITS FOR COMPUTER-AIDED CIRCUIT MODELING
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YANG, YH; WU, CY; CHEN, WY |
| 國立交通大學 |
2014-12-08T15:06:00Z |
GENERAL EXPERIMENTAL-METHOD OF PARAMETER EXTRACTION FOR CMOS TIMING MACROMODELS
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WU, CY; JANG, WY; WU, HJ |
| 國立交通大學 |
2014-12-08T15:05:59Z |
INTEGRAL-EQUATION SOLUTION FOR HYPERBOLIC HEAT-CONDUCTION WITH SURFACE RADIATION
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WU, CY |
| 國立交通大學 |
2014-12-08T15:05:59Z |
TIMING MACROMODELS FOR CMOS STATIC SET RESET LATCHES AND THEIR APPLICATIONS
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WU, CY; LI, C; HWANG, JS |
| 國立交通大學 |
2014-12-08T15:05:57Z |
A NEW EXPERIMENTAL-METHOD TO DETERMINE THE SATURATION VOLTAGE OF A SMALL-GEOMETRY MOSFET
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JANG, WY; WU, CY; WU, HJ |
| 國立交通大學 |
2014-12-08T15:05:57Z |
A NEW LATERAL GROWTH FREE FORMATION TECHNIQUE FOR TITANIUM SILICIDE USING THE SI/W/TI TRILAYER STRUCTURE
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LIN, MZ; WU, CY |
| 國立交通大學 |
2014-12-08T15:05:56Z |
LOW-POWER DYNAMIC TERNARY LOGIC
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WANG, JS; WU, CY; TSAI, MK |
| 國立交通大學 |
2014-12-08T15:05:55Z |
COBALT SILICIDE INTERCONNECTION FROM A SI/W/CO TRILAYER STRUCTURE
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LIN, MZ; WU, CY |
| 國立交通大學 |
2014-12-08T15:05:53Z |
NEW MONOLITHIC SWITCHED-CAPACITOR DIFFERENTIATORS WITH GOOD NOISE REJECTION
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WU, CY; YU, TC; CHANG, SS |
Showing items 286-335 of 607 (13 Page(s) Totally)
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