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Showing items 1-7 of 7 (1 Page(s) Totally)
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| 國立交通大學 |
2014-12-08T15:47:25Z |
MPT-based branch-and-bound strategy for scheduling problem in high-level synthesis
|
Hsiao, PY; Wu, GM; Su, JY |
| 國立交通大學 |
2014-12-08T15:46:10Z |
Quasi-universal switch matrices for FPD design
|
Wu, GM; Chang, YW |
| 國立交通大學 |
2014-12-08T15:43:22Z |
Generic ILP-based approaches for time-multiplexed FPGA partitioning
|
Wu, GM; Lin, JM; Chang, YW |
| 國立交通大學 |
2014-12-08T15:39:40Z |
Universal switch blocks for three-dimensional FPGA design
|
Wu, GM; Shyu, M; Chang, YM |
| 國立交通大學 |
2014-12-08T15:37:16Z |
A clustering- and probability-based approach for time-multiplexed FPGA partitioning
|
Wu, GM; Chao, MCT; Chang, YW |
| 國立交通大學 |
2014-12-08T15:27:18Z |
Maximally routable switch matrices for FPD design
|
Wu, GM; Chang, YW |
| 國立交通大學 |
2014-12-08T15:27:04Z |
B*-trees: A new representation for non-slicing floorplans
|
Chang, YC; Chang, YW; Wu, GM; Wu, SW |
Showing items 1-7 of 7 (1 Page(s) Totally)
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