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Showing items 6-30 of 158 (7 Page(s) Totally) 1 2 3 4 5 6 7 > >> View [10|25|50] records per page
臺大學術典藏 |
2021-05-24T13:07:21Z |
Parallel Asynchronous Stochastic Dual Coordinate Descent Algorithms for High Efficiency and Stable Convergence
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Chen, Yung Chen; PANGFENG LIU; Wu, Jan Jan |
臺大學術典藏 |
2021-04-21T23:30:04Z |
Exploiting Data Entropy for Neural Network Compression
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Chen, Tse Wen; PANGFENG LIU; Wu, Jan Jan |
臺大學術典藏 |
2021-04-21T23:30:03Z |
An Adaptive Layer Expansion Algorithm for Efficient Training of Deep Neural Networks
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Chen, Yi Long; PANGFENG LIU; Wu, Jan Jan |
臺大學術典藏 |
2020-05-04T08:08:41Z |
LnQ: Building High Performance Dynamic Binary Translators with Existing Compiler Backends.
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WEI-CHUNG HSU; Hsu, Chun-Chen;Liu, Pangfeng;Wang, Chien-Min;Wu, Jan-Jan;Hong, Ding-Yong;Yew, Pen-Chung;Hsu, Wei-Chung; Hsu, Chun-Chen; Liu, Pangfeng; Wang, Chien-Min; Wu, Jan-Jan; Hong, Ding-Yong; Yew, Pen-Chung; Hsu, Wei-Chung |
臺大學術典藏 |
2020-05-04T08:08:40Z |
HQEMU: a multi-threaded and retargetable dynamic binary translator on multicores.
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Hong, Ding-Yong; Hsu, Chun-Chen; Yew, Pen-Chung; Wu, Jan-Jan; Hsu, Wei-Chung; Liu, Pangfeng; Wang, Chien-Min; Chung, Yeh-Ching; WEI-CHUNG HSU |
臺大學術典藏 |
2020-05-04T08:08:39Z |
Improving dynamic binary optimization through early-exit guided code region formation.
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Hsu, Chun-Chen;Liu, Pangfeng;Wu, Jan-Jan;Yew, Pen-Chung;Hong, Ding-Yong;Hsu, Wei-Chung;Wang, Chien-Min; Hsu, Chun-Chen; Liu, Pangfeng; Wu, Jan-Jan; Yew, Pen-Chung; Hong, Ding-Yong; Hsu, Wei-Chung; Wang, Chien-Min; WEI-CHUNG HSU |
臺大學術典藏 |
2020-05-04T08:08:38Z |
DBILL: an efficient and retargetable dynamic binary instrumentation framework using llvm backend.
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Lyu, Yi-Hong;Hong, Ding-Yong;Wu, Tai-Yi;Wu, Jan-Jan;Hsu, Wei-Chung;Liu, Pangfeng;Yew, Pen-Chung; Lyu, Yi-Hong; Hong, Ding-Yong; Wu, Tai-Yi; Wu, Jan-Jan; Hsu, Wei-Chung; Liu, Pangfeng; Yew, Pen-Chung; WEI-CHUNG HSU |
臺大學術典藏 |
2020-05-04T08:08:38Z |
Efficient memory virtualization for Cross-ISA system mode emulation.
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Chang, Chao-Rui;Wu, Jan-Jan;Hsu, Wei-Chung;Liu, Pangfeng;Yew, Pen-Chung; Chang, Chao-Rui; Wu, Jan-Jan; Hsu, Wei-Chung; Liu, Pangfeng; Yew, Pen-Chung; WEI-CHUNG HSU |
臺大學術典藏 |
2020-05-04T08:08:37Z |
SIMD Code Translation in an Enhanced HQEMU.
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Fu, Sheng-Yu; Hong, Ding-Yong; Wu, Jan-Jan; Liu, Pangfeng; Hsu, Wei-Chung; WEI-CHUNG HSU; Fu, Sheng-Yu;Hong, Ding-Yong;Wu, Jan-Jan;Liu, Pangfeng;Hsu, Wei-Chung |
臺大學術典藏 |
2020-05-04T08:08:36Z |
Exploiting Longer SIMD Lanes in Dynamic Binary Translation.
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Hong, Ding-Yong; Fu, Sheng-Yu; Liu, Yu-Ping; Wu, Jan-Jan; Hsu, Wei-Chung; WEI-CHUNG HSU |
臺大學術典藏 |
2020-05-04T08:08:35Z |
Dynamic tuning of applications using restricted transactional memory.
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Lin, Shih-Kai; Hong, Ding-Yong; Fu, Sheng-Yu; Wu, Jan-Jan; Hsu, Wei-Chung; WEI-CHUNG HSU |
臺大學術典藏 |
2020-05-04T08:08:35Z |
Exploiting Asymmetric SIMD Register Configurations in ARM-to-x86 Dynamic Binary Translation.
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WEI-CHUNG HSU; Liu, Yu-Ping; Hong, Ding-Yong; Wu, Jan-Jan; Fu, Sheng-Yu; Hsu, Wei-Chung |
臺大學術典藏 |
2020-05-04T08:08:35Z |
Dynamic translation of structured Loads/Stores and register mapping for architectures with SIMD extensions.
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Fu, Sheng-Yu; Hong, Ding-Yong; Liu, Yu-Ping; Wu, Jan-Jan; Hsu, Wei-Chung; WEI-CHUNG HSU |
臺大學術典藏 |
2020-05-04T08:08:35Z |
Exploiting SIMD capability in an ARMv7-to-ARMv8 dynamic binary translator.
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Fu, Sheng-Yu; Lin, Chih-Min; Hong, Ding-Yong; Liu, Yu-Ping; Wu, Jan-Jan; Hsu, Wei-Chung; WEI-CHUNG HSU |
臺大學術典藏 |
2020-05-04T08:08:34Z |
Exploiting Vector Processing in Dynamic Binary Translation.
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Lin, Chih-Min;Fu, Sheng-Yu;Hong, Ding-Yong;Liu, Yu-Ping;Wu, Jan-Jan;Hsu, Wei-Chung; Lin, Chih-Min; Fu, Sheng-Yu; Hong, Ding-Yong; Liu, Yu-Ping; Wu, Jan-Jan; Hsu, Wei-Chung; WEI-CHUNG HSU |
臺大學術典藏 |
2020-05-04T08:08:31Z |
Improving Dynamic Binary Optimization Through Early-Exit Guided Code Region Formation
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Hsu, Chun-Chen;Liu, Pangfeng;Wu, Jan-Jan;Yew, Pen-Chung;Hong, Ding-Yong;Hsu, Wei-Chung;Wang, Chien-Min; Hsu, Chun-Chen; Liu, Pangfeng; Wu, Jan-Jan; Yew, Pen-Chung; Hong, Ding-Yong; Hsu, Wei-Chung; Wang, Chien-Min; WEI-CHUNG HSU |
臺大學術典藏 |
2020-05-04T08:08:30Z |
DBILL: An Efficient and Retargetable Dynamic Binary Instrumentation Framework using LLVM Backend
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Lyu, Yi-Hong;Hong, Ding-Yong;Wu, Tai-Yi;Wu, Jan-Jan;Hsu, Wei-Chung;Liu, Pangfeng;Yew, Pen-Chung; Lyu, Yi-Hong; Hong, Ding-Yong; Wu, Tai-Yi; Wu, Jan-Jan; Hsu, Wei-Chung; Liu, Pangfeng; Yew, Pen-Chung; WEI-CHUNG HSU |
臺大學術典藏 |
2020-05-04T08:08:30Z |
Efficient Memory Virtualization for Cross-ISA System Mode Emulation
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Chang, Chao-Jui;Wu, Jan-Jan;Hsu, Wei-Chung;Liu, Pangfeng;Yew, Pen-Chung; Chang, Chao-Jui; Wu, Jan-Jan; Hsu, Wei-Chung; Liu, Pangfeng; Yew, Pen-Chung; WEI-CHUNG HSU |
臺大學術典藏 |
2020-05-04T08:08:22Z |
Enhancing Transactional Memory Execution via Dynamic Binary Translation
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WEI-CHUNG HSU; Hsu, Wei-Chung; Wu, Jan-Jan; Fu, Sheng-Yu; Lin, Shih-Kai; Hong, Ding-Yong; Hong, Ding-Yong;Lin, Shih-Kai;Fu, Sheng-Yu;Wu, Jan-Jan;Hsu, Wei-Chung |
臺大學術典藏 |
2020-05-04T08:02:53Z |
A Framework for Parallel Tree-Based Scientific Simulations.
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Liu, Pangfeng; Wu, Jan-Jan; PANGFENG LIU |
臺大學術典藏 |
2020-05-04T08:02:52Z |
An Incremental Network Topology for Contention-free and Deadlock-free Routing.
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PANGFENG LIU; Liu, Pangfeng; Lin, Yi-Fang; Wu, Jan-Jan |
臺大學術典藏 |
2020-05-04T08:02:52Z |
Scheduling Multiple Multicast for Heterogeneous Network of Workstations with Non-Blocking Message-Passing.
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PANGFENG LIU; Liu, Pangfeng; Wu, Jan-Jan; Yeh, Shih-Hsien |
臺大學術典藏 |
2020-05-04T08:02:51Z |
I/O Processor Allocation for Mesh Cluster Computers.
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Liu, Pangfeng; Hsu, Chun-Chen; Wu, Jan-Jan; PANGFENG LIU |
臺大學術典藏 |
2020-05-04T08:02:51Z |
Distributed Scheduling of Parallel I/O in the Presence of Data Replication.
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Wu, Jan-Jan; Liu, Pangfeng; PANGFENG LIU |
臺大學術典藏 |
2020-05-04T08:02:51Z |
Efficient Parallel I/O Scheduling in the Presence of Data Duplication.
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PANGFENG LIU; Wu, Jan-Jan; Wang, Da-Wei; Liu, Pangfeng |
Showing items 6-30 of 158 (7 Page(s) Totally) 1 2 3 4 5 6 7 > >> View [10|25|50] records per page
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