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"wu jieh tsorng"
Showing items 86-96 of 96 (2 Page(s) Totally)
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| 國立交通大學 |
2014-12-08T15:28:51Z |
A CMOS 5.37-mW 10-Bit 200-MS/s Dual-Path Pipelined ADC
|
Chai, Yun; Wu, Jieh-Tsorng |
| 國立交通大學 |
2014-12-08T15:24:43Z |
A CMOS 15-bit 125-MS/s time-interleaved ADC with digital background. calibration
|
Lee, Zwei-Mei; Wang, Cheng-Yeh; Wu, Jieh-Tsorng |
| 國立交通大學 |
2014-12-08T15:21:05Z |
A CMOS 6-mW 10-bit 100-MS/s Two-Step ADC
|
Chung, Yung-Hui; Wu, Jieh-Tsorng |
| 國立交通大學 |
2014-12-08T15:21:00Z |
A 12-Bit 1.25-GS/s DAC in 90 nm CMOS With > 70 dB SFDR up to 500 MHz
|
Tseng, Wei-Hsin; Fan, Chi-Wei; Wu, Jieh-Tsorng |
| 國立交通大學 |
2014-12-08T15:20:30Z |
ADC Clock Jitter Measurement and Correction Using a Stochastic TDC
|
Fan, Chi-Wei; Wu, Jieh-Tsorng |
| 國立交通大學 |
2014-12-08T15:13:52Z |
A robust and fast digital background calibration technique for pipelined ADCs
|
Fan, Jen-Lin; Wang, Chung-Yi; Wu, Jieh-Tsorng |
| 國立交通大學 |
2014-12-08T15:11:50Z |
A CMOS 6-Bit 16-GS/s Time-Interleaved ADC Using Digital Background Calibration Techniques
|
Huang, Chun-Cheng; Wang, Chung-Yi; Wu, Jieh-Tsorng |
| 國立交通大學 |
2014-12-08T15:09:21Z |
A Multiphase Timing-Skew Calibration Technique Using Zero-Crossing Detection
|
Wang, Chung-Yi; Wu, Jieh-Tsorng |
| 國立交通大學 |
2014-12-08T15:08:20Z |
Jitter Measurement and Compensation for Analog-to-Digital Converters
|
Fan, Chi-Wei; Wu, Jieh-Tsorng |
| 國立交通大學 |
2014-12-08T15:07:13Z |
A CMOS 6-mW 10-bit 100-MS/s Two-Step ADC
|
Chung, Yung-Hui; Wu, Jieh-Tsorng |
| 國立交通大學 |
2014-12-08T15:05:23Z |
A CMOS 15-bit 125-MS/s time-interleaved ADC with digital background calibration
|
Lee, Zwei-Mei; Wang, Cheng-Yeh; Wu, Jieh-Tsorng |
Showing items 86-96 of 96 (2 Page(s) Totally)
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