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Showing items 11-15 of 15 (1 Page(s) Totally)
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| 臺大學術典藏 |
2020-06-11T06:45:53Z |
Current-mode adaptively hysteretic control for buck converters with fast transient response and improved output regulation
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Wu, K.-I.;Hung, S.-H.;Shieh, S.-Y.;Hwang, B.-T.;Hung, S.-Y.;Chen, C.C.-P.; Wu, K.-I.; Hung, S.-H.; Shieh, S.-Y.; Hwang, B.-T.; Hung, S.-Y.; Chen, C.C.-P.; CHUNG-PING CHEN |
| 臺大學術典藏 |
2020-06-11T06:45:53Z |
A 8.1/5.4/2.7/1.62 Gb/s receiver for DisplayPort Version 1.3 with automatic bit-rate tracking scheme
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Chien, A.;Hung, S.-H.;Wu, K.-I.;Liu, C.-Y.;Hsieh, M.-H.;Chen, C.C.-P.; Chien, A.; Hung, S.-H.; Wu, K.-I.; Liu, C.-Y.; Hsieh, M.-H.; Chen, C.C.-P.; CHUNG-PING CHEN |
| 臺大學術典藏 |
2020-06-11T06:45:53Z |
A 8.1/5.4/2.7/1.62 Gb/s receiver for DisplayPort Version 1.3 with automatic bit-rate tracking scheme
|
Chien, A.;Hung, S.-H.;Wu, K.-I.;Liu, C.-Y.;Hsieh, M.-H.;Chen, C.C.-P.; Chien, A.; Hung, S.-H.; Wu, K.-I.; Liu, C.-Y.; Hsieh, M.-H.; Chen, C.C.-P.; CHUNG-PING CHEN |
| 臺大學術典藏 |
2020-06-11T06:45:53Z |
A 160MHz-to-2GHz low jitter fast lock all-digital DLL with phase tracking technique
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Hung, S.-H.;Kao, W.-H.;Wu, K.-I.;Huang, Y.-W.;Hsieh, M.-H.;Chen, C.C.-P.; Hung, S.-H.; Kao, W.-H.; Wu, K.-I.; Huang, Y.-W.; Hsieh, M.-H.; Chen, C.C.-P.; CHUNG-PING CHEN |
| 臺大學術典藏 |
2020-06-11T06:45:53Z |
A 160MHz-to-2GHz low jitter fast lock all-digital DLL with phase tracking technique
|
Hung, S.-H.;Kao, W.-H.;Wu, K.-I.;Huang, Y.-W.;Hsieh, M.-H.;Chen, C.C.-P.; Hung, S.-H.; Kao, W.-H.; Wu, K.-I.; Huang, Y.-W.; Hsieh, M.-H.; Chen, C.C.-P.; CHUNG-PING CHEN |
Showing items 11-15 of 15 (1 Page(s) Totally)
1
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