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Showing items 1-4 of 4 (1 Page(s) Totally) 1 View [10|25|50] records per page
臺大學術典藏 |
2020-06-11T07:06:10Z |
A 2 x 25-Gb/s Receiver With 2:5 DMUX for 100-Gb/s Ethernet
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Wu, Ke-Chung;Lee, Jri; Wu, Ke-Chung; Lee, Jri; JRI LEE |
臺大學術典藏 |
2020-06-11T07:06:09Z |
A 20-Gb/s Full-Rate Linear Clock and Data Recovery Circuit With Automatic Frequency Acquisition
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Lee, Jri;Wu, Ke-Chung; Lee, Jri; Wu, Ke-Chung; JRI LEE |
國立臺灣大學 |
2010 |
應用於100Gb/s乙太網路系統之CMOS寬頻接收機
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吳克中; Wu, Ke-Chung |
國立臺灣大學 |
2005-12 |
Hybrid-mode embedded compression for H.264/AVC video coding system
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Chen, Tung-Chien; Chen, Yu-Han; Wu, Ke-Chung; Chen, Liang-Gee |
Showing items 1-4 of 4 (1 Page(s) Totally) 1 View [10|25|50] records per page
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