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Showing items 1-25 of 36  (2 Page(s) Totally)
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Institution Date Title Author
國立臺灣體育運動大學 2019-03-01 新觀點:健身運動與營養補充劑對認知老化之影響 陳豐慈;詹貴惠;馮勝賢;吳聰義;高士竣;張育愷; Chen, Feng-Tzu;Chan, Kuei-Hui;Feng, Sheng-Hsien;Wu, Tsung-Yi;Kao, Shih-Chun;Chang, Yu-Kai
國立政治大學 2019 薩德事件對中韓關係的影響 吳宗宜; Wu, Tsung-Yi
國立臺灣體育運動大學 2017-03-01 自我對話在射箭之介紹與運用 吳聰義;吳治翰;邱炳坤;張育愷;張怡潔; Wu, Tsung-Yi;Wu, Chih-Han;Chiu, Ping-Kun;Chang, Yu-Kai;Chang, Yi-Chieh
國立臺灣體育運動大學 2016-11-01 Effects of exercise on memory related cognitive function Yang, Wen-Chung;Chen, Feng-Tzu;Wu, Tsung-Yi;Chen, Lee-Hwa;Chang, Yu-Kai; 楊文中;陳豐慈;吳聰義;陳麗華;張育愷
國立臺灣體育運動大學 2016-09-01 意象訓練在射箭之介紹與運用 吳聰義;張怡潔;邱炳坤;張育愷; Wu, Tsung-Yi;Chang, Yi-Chieh;Chiu, Ping-Kun Chiu;Chang, Yu-Kai
國立交通大學 2015-12-04T07:03:13Z VARIABLE-LATENCY SPECULATING PIPELINED BOOTH MULTIPLIER WITH STATISTICAL CARRY ESTIMATION FOR ERROR DETECTION AND RECOVERY Liu Chih-Wei; Chen Shin-Kai; Chang Kuo-Chiang; Wu Tsung-Yi; Tsai An-Chi
國立臺灣體育運動大學 2015-11-01 健身運動對執行功能的影響:威斯康辛卡片分類測驗的視角 王俊智;吳聰義;吳治翰;張育愷; Wang, Chun-Chih; Wu, Tsung-Yi; Wu, Chih-Han; Chang, Yu-Kai
國立交通大學 2014-12-12T02:17:11Z 列聯表參數的估計 吳宗益; Wu, Tsung-Yi; 周幼珍; Jou Yow-Jen
國立交通大學 2014-12-12T01:55:28Z 針對多媒體應用之可變延遲且具猜測能力布斯乘法器之研究 吳宗宜; Wu, Tsung-Yi; 劉志尉; Liu, Chih-Wei
國立交通大學 2014-12-08T15:32:16Z Design and Implementation of High-Speed and Energy-Efficient Variable-Latency Speculating Booth Multiplier (VLSBM) Chen, Shin-Kai; Liu, Chih-Wei; Wu, Tsung-Yi; Tsai, An-Chi
國立臺灣體育運動大學 2013-06-01 臺灣基層運動選手社會支持對運動參與動機之影響 張怡潔; 吳聰義; 林季燕; Chang, Yi-Chieh; Wu, Tsung-Yi; Lin, Chi-Yen
東海大學 2013 使用活性碳電極於電容去離子技術移除水中銅離子之研究 吳宗頤; Wu,Tsung-Yi
國立臺灣體育運動大學 2012-06-01 運動科學界使用科學引用指數來評比學者學術成就:客觀或爭議? 吳昇光;吳聰義; Wu, Sheng K.;Wu, Tsung-Yi
國立臺灣體育運動大學 2011-06-01 我國因應國際射箭局點系統新制之探討 吳聰義; 姜義村; Wu, Tsung-Yi; Chiang, I-Tsun
國立彰化師範大學 2011-04 A High Speed Design Using Divide-and-Conquer Architecture for Motion Estimation Wu, Tsung-Yi; Huang, Shi-Yi
國立臺灣體育運動大學 2011-03-01 急性健身運動對認知功能的影響事件相關電位的文獻回顧 張育愷; 吳聰義; Chang, Yu-Kai; Wu, Tsung-Yi
國立彰化師範大學 2010-12 Combined Use of Rising and Falling Edge Triggered Clocks for Peak Current Reduction in IP-Based SoC/NoC Designs Wu, Tsung-Yi; Kao, Tzi-Wei; Lin, How-Rern
國立彰化師範大學 2010-08 Peak Current Reduction Using an MTCMOS Technique Lu, Liang-Ying; Wu, Tsung-Yi; Chiou, Lih-Yih; Shi, Jing-Wen
國立彰化師範大學 2010-01 Combined Use of Rising and Falling Edge Triggered Clocks for Peak Current Reduction in IP-Based SoC Designs Wu, Tsung-Yi; Kao, Tzi-Wei; Huang, Shi-Yi; Li, Tai-Lun; Lin, How-Rern
大葉大學 2009-05-25 A VLSI Design with Built-in SRAM Arrays for Implementing Full Search Block Matching Algorithm Wu, Tsung-Yi;Lin, How-Rern;Chen, Kuang-Yao;Huang, Shi-Yi;Li, Tai-Lun
大葉大學 2009-05-25 A Peak Current and Power Pad Count Reduction Tool for System-Level IC Designers Wu, Tsung-Yi;Lin, How-Rern;Kao, Tzi-Wei;Huang, Shi-Yi;Li, Tai-Lun
國立彰化師範大學 2009-05 A VLSI Design with Built-in SRAM Arrays for Implementing Full Search Block Matching Algorithm Wu, Tsung-Yi; Chen, Kuang-Yao; Huang, Shi-Yi; Li, Tai-Lun; Lin, How-Rern
國立彰化師範大學 2009-05 A Peak Current and Power Pad Count Reduction Tool for System-Level IC Designers Wu, Tsung-Yi; Kao, Tzi-Wei; Huang, Shi-Yi; Li, Tai-Lun; Lin, How-Rern
大葉大學 2009-04-1 A Conditional Isolation Technique for Low-Energy and High-Performance Wide Domino Gates Lin, How-Rern;Chiu, Wei-Hao;Wu, Tsung-Yi
大葉大學 2009-04-01 A Conditional Isolation Technique for Low-Energy and High-Performance Wide Domino Gates Lin, How-Rern;Chiu, Wei-Hao;Wu, Tsung-Yi

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