English  |  正體中文  |  简体中文  |  Total items :2832440  
Visitors :  33806182    Online Users :  1430
Project Commissioned by the Ministry of Education
Project Executed by National Taiwan University Library
 
臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
About TAIR

Browse By

News

Copyright

Related Links

"wu tsung yi"

Return to Browse by Author
Sorting by Title Sort by Date

Showing items 11-35 of 36  (2 Page(s) Totally)
1 2 > >>
View [10|25|50] records per page

Institution Date Title Author
國立臺灣體育運動大學 2013-06-01 臺灣基層運動選手社會支持對運動參與動機之影響 張怡潔; 吳聰義; 林季燕; Chang, Yi-Chieh; Wu, Tsung-Yi; Lin, Chi-Yen
東海大學 2013 使用活性碳電極於電容去離子技術移除水中銅離子之研究 吳宗頤; Wu,Tsung-Yi
國立臺灣體育運動大學 2012-06-01 運動科學界使用科學引用指數來評比學者學術成就:客觀或爭議? 吳昇光;吳聰義; Wu, Sheng K.;Wu, Tsung-Yi
國立臺灣體育運動大學 2011-06-01 我國因應國際射箭局點系統新制之探討 吳聰義; 姜義村; Wu, Tsung-Yi; Chiang, I-Tsun
國立彰化師範大學 2011-04 A High Speed Design Using Divide-and-Conquer Architecture for Motion Estimation Wu, Tsung-Yi; Huang, Shi-Yi
國立臺灣體育運動大學 2011-03-01 急性健身運動對認知功能的影響事件相關電位的文獻回顧 張育愷; 吳聰義; Chang, Yu-Kai; Wu, Tsung-Yi
國立彰化師範大學 2010-12 Combined Use of Rising and Falling Edge Triggered Clocks for Peak Current Reduction in IP-Based SoC/NoC Designs Wu, Tsung-Yi; Kao, Tzi-Wei; Lin, How-Rern
國立彰化師範大學 2010-08 Peak Current Reduction Using an MTCMOS Technique Lu, Liang-Ying; Wu, Tsung-Yi; Chiou, Lih-Yih; Shi, Jing-Wen
國立彰化師範大學 2010-01 Combined Use of Rising and Falling Edge Triggered Clocks for Peak Current Reduction in IP-Based SoC Designs Wu, Tsung-Yi; Kao, Tzi-Wei; Huang, Shi-Yi; Li, Tai-Lun; Lin, How-Rern
大葉大學 2009-05-25 A VLSI Design with Built-in SRAM Arrays for Implementing Full Search Block Matching Algorithm Wu, Tsung-Yi;Lin, How-Rern;Chen, Kuang-Yao;Huang, Shi-Yi;Li, Tai-Lun
大葉大學 2009-05-25 A Peak Current and Power Pad Count Reduction Tool for System-Level IC Designers Wu, Tsung-Yi;Lin, How-Rern;Kao, Tzi-Wei;Huang, Shi-Yi;Li, Tai-Lun
國立彰化師範大學 2009-05 A VLSI Design with Built-in SRAM Arrays for Implementing Full Search Block Matching Algorithm Wu, Tsung-Yi; Chen, Kuang-Yao; Huang, Shi-Yi; Li, Tai-Lun; Lin, How-Rern
國立彰化師範大學 2009-05 A Peak Current and Power Pad Count Reduction Tool for System-Level IC Designers Wu, Tsung-Yi; Kao, Tzi-Wei; Huang, Shi-Yi; Li, Tai-Lun; Lin, How-Rern
大葉大學 2009-04-1 A Conditional Isolation Technique for Low-Energy and High-Performance Wide Domino Gates Lin, How-Rern;Chiu, Wei-Hao;Wu, Tsung-Yi
大葉大學 2009-04-01 A Conditional Isolation Technique for Low-Energy and High-Performance Wide Domino Gates Lin, How-Rern;Chiu, Wei-Hao;Wu, Tsung-Yi
國立成功大學 2009-04 Low-Leakage and Low-Power Implementation of High-Speed Logic Gates Wu, Tsung-Yi; Lu, Liang-Ying
國立彰化師範大學 2009 A Conditional Isolation Technique for Low-Energy and High-Performance Wide Domino Gates Lin, How-Rern; Chiu, Wei-Hao; Wu, Tsung-Yi
國立彰化師範大學 2009 Low-Leakage and Low-Power Implementation of High-Speed Logic Gates Wu, Tsung-Yi ; Lu, Liang-Ying
國立彰化師範大學 2008-12 Low-Leakage and Low-Power Implementation of High-Speed 65nm Logic Gates Wu, Tsung-Yi; Lu, Liang-Ying; Liang, Cheng-Hsun
國立臺灣體育運動大學 2008-05-01 國小排球選手運動參與動機之研究 張怡潔; 吳聰義; Chang, Yi-Chieh; Wu, Tsung-Yi
國立彰化師範大學 2008-03 IR Drop Reduction Via a Flip-Flop Resynthesis Technique Wu, Jiun-Kuan; Wu, Tsung-Yi; Lu, Liang-Ying; Chen, Kuang-Yao
國立彰化師範大學 2007-01 A Fast Probability-Based Algorithm for Leakage Current Reduction Considering Controller Cost Wu, Tsung-Yi; Tzeng, Jr-Luen; Chen, Kuang-Yao
國立成功大學 2006-07-21 1070鋼受拘束熱循環下增量式內涵時間循環黏塑性計算法之評估 吳宗益; Wu, Tsung-Yi
國立臺灣大學 2006 以影像方式擷取非球型物體之雙向反射分佈函數 吳宗益; Wu, Tsung-Yi
國立臺灣大學 2005 Image-based BRDF acquisition for non-spherical objects 吳宗益; 馬萬鈞; 莊永裕; 陳炳宇; 歐陽明; Wu, Tsung-Yi; Ma, Wan-Chun; Chuang, Yung-Yu; Chen, Bing-Yu; Ouhyoung, Ming

Showing items 11-35 of 36  (2 Page(s) Totally)
1 2 > >>
View [10|25|50] records per page