臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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Institution	Date	Title	Author
臺大學術典藏	2020-10-07T01:23:17Z	Analysis of Single-Trap-Induced Random Telegraph Noise on FinFET Devices, 6T SRAM Cell, and Logic Circuits	VITA PI-HO HU; 胡璧合; C.-T. Chuang; P. Su; Y.-N. Chen; V. P.-H. Hu; M.-L. Fan; VITA PI-HO HU; C.-T. Chuang; Y.-N. Chen; P. Su; V. P.-H. Hu; M.-L. Fan
臺大學術典藏	2020-10-07T01:23:17Z	Variability Analysis of Sense Amplifier for FinFET Subthreshold SRAM Applications	胡璧合; VITA PI-HO HU; C.-T. Chuang; P. Su; Y.-N. Chen; V. P.-H. Hu; M.-L. Fan; VITA PI-HO HU; P. Su; C.-T. Chuang; Y.-N. Chen; V. P.-H. Hu; M.-L. Fan
臺大學術典藏	2020-10-07T01:23:16Z	Analysis of Single-Trap-Induced Random Telegraph Noise and its Interaction With Work Function Variation for Tunnel FET	M.-L. Fan; VITA PI-HO HU; C.-T. Chuang; P. Su; Y.-N. Chen; M.-L. Fan;V. P.-H. Hu;Y.-N. Chen;P. Su;C.-T. Chuang; M.-L. Fan; V. P.-H. Hu; V. P.-H. Hu; Y.-N. Chen; P. Su; C.-T. Chuang; 胡璧合; VITA PI-HO HU
臺大學術典藏	2020-10-07T01:23:16Z	Design and Analysis of Robust Tunneling FET SRAM	C.-T. Chuang; V. P.-H. Hu; P. Su; Y.-N. Chen; M.-L. Fan; Y.-N. Chen;M.-L. Fan;V. P.-H. Hu;P. Su;C.-T. Chuang; Y.-N. Chen; M.-L. Fan; V. P.-H. Hu; P. Su; C.-T. Chuang; VITA PI-HO HU; 胡璧合; VITA PI-HO HU
臺大學術典藏	2020-10-07T01:23:15Z	Evaluation of Sub-0.2 V High-Speed Low-Power Circuits Using Hetero-Channel MOSFET and Tunneling FET Devices	VITA PI-HO HU; 胡璧合; C.-T. Chuang; Pin Su; V. P.-H. Hu; M.-L. Fan; Y.-N. Chen; VITA PI-HO HU; Pin Su; C.-T. Chuang; Y.-N. Chen;M.-L. Fan;V. P.-H. Hu;Pin Su;C.-T. Chuang; Y.-N. Chen; M.-L. Fan; V. P.-H. Hu
臺大學術典藏	2020-10-07T01:23:15Z	Stability and Performance Optimization of Heterochannel Monolithic 3-D SRAM Cells Considering Interlayer Coupling	胡璧合; VITA PI-HO HU; C.-T. Chuang; M.-L. Fan;V. P.-H. Hu;Y.-N. Chen;P. Su;C.-T. Chuang; M.-L. Fan; V. P.-H. Hu; Y.-N. Chen; P. Su; C.-T. Chuang; VITA PI-HO HU; M.-L. Fan; V. P.-H. Hu; Y.-N. Chen; P. Su
臺大學術典藏	2020-10-07T01:23:15Z	Single-trap-induced random telegraph noise for FinFET, Si/Ge Nanowire FET, Tunnel FET, SRAM and logic circuits	C.-T. Chuang; Y.-N. Chen; P. Su; V. P.-H. Hu; S.-Y. Yang; M.-L. Fan;S.-Y. Yang;V. P.-H. Hu;Y.-N. Chen;P. Su;C.-T. Chuang; M.-L. Fan; S.-Y. Yang; V. P.-H. Hu; Y.-N. Chen; P. Su; C.-T. Chuang; VITA PI-HO HU; M.-L. Fan; 胡璧合; VITA PI-HO HU
臺大學術典藏	2020-10-07T01:23:14Z	Impacts of Work Function Variation and Line-Edge Roughness on TFET and FinFET Devices and 32-Bit CLA Circuits	VITA PI-HO HU; 胡璧合; C.-T. Chuang; Pin Su; V. P.-H. Hu; M.-L. Fan; C.-J. Chen; Y.-N. Chen; VITA PI-HO HU; C.-T. Chuang; Pin Su; V. P.-H. Hu; M.-L. Fan; C.-J. Chen; Y.-N. Chen; Y.-N. Chen;C.-J. Chen;M.-L. Fan;V. P.-H. Hu;Pin Su;C.-T. Chuang
臺大學術典藏	2015	Investigation of Backgate-Biasing Effect for Ultrathin-Body III-V Heterojunction Tunnel FET	C.-W. Hsu; Pin Su; C.-T. Chuang; 胡璧合; VITA PI-HO HU; Y.-N. Chen; V. P.-H. Hu; M.-L. Fan; Pin Su; C.-T. Chuang; VITA PI-HO HU; C.-W. Hsu; Y.-N. Chen; V. P.-H. Hu; M.-L. Fan; M.-L. Fan;V. P.-H. Hu;Y.-N. Chen;C.-W. Hsu;Pin Su;C.-T. Chuang
臺大學術典藏	2014	Evaluation of Stabilit, Performance of Ultra-Low Voltage MOSFET, TFET, and Mixed TFET-MOSFET SRAM Cell With Write-Assist Circuits	VITA PI-HO HU; 胡璧合; C.-T. Chuang; Pin Su; V. P.-H. Hu; M.-L. Fan; Y.-N. Chen; VITA PI-HO HU; C.-T. Chuang; Pin Su; V. P.-H. Hu; M.-L. Fan; Y.-N. Chen; Y.-N. Chen;M.-L. Fan;V. P.-H. Hu;Pin Su;C.-T. Chuang

Showing items 1-10 of 21 (3 Page(s) Totally)
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