|
"yang chia hsiang"的相關文件
顯示項目 41-65 / 71 (共3頁)
<< < 1 2 3 > >>
每頁顯示[10|25|50]項目
| 國立交通大學 |
2015-07-21T08:31:29Z |
A 0.5V 1.27mW Nose-on-a-Chip for Rapid Diagnosis of Ventilator-Associated Pneumonia
|
Tang, Kea-Tiong; Chiu, Shih-Wen; Shih, Chung-Hung; Chang, Chia-Ling; Yang, Chia-Min; Yao, Da-Jeng; Wang, Jen-Huo; Huang, Chien-Ming; Chen, Hsin; Chang, Kwuang-Han; Hsieh, Chih-Cheng; Chang, Ting-Hau; Chang, Meng-Fan; Wang, Chia-Min; Liu, Yi-Wen; Chen, Tsan-Jieh; Yang, Chia-Hsiang; Chiueh, Herming; Shyu, Jyuo-Min |
| 國立交通大學 |
2015-07-21T08:29:27Z |
A Systolic Array Based GTD Processor With a Parallel Algorithm
|
Yang, Chia-Hsiang; Chou, Chun-Wei; Hsu, Chia-Shen; Chen, Chiao-En |
| 國立交通大學 |
2015-07-21T08:29:15Z |
An 81.6 mu W FastICA Processor for Epileptic Seizure Detection
|
Yang, Chia-Hsiang; Shih, Yi-Hsin; Chiueh, Herming |
| 國立交通大學 |
2015-07-21T08:28:38Z |
AN EXPERIMENTAL COMPARISON OF DIRECTLY AND INDIRECTLY DERIVED MODULATION TRANSFER FUNCTIONS
|
Yang, Chia-Hsiang; Wang, Shue-Chia; Shih, Peter T. Y.; Lee, Pei-Shan; Liu, Jeng-Lun |
| 國立交通大學 |
2015-07-21T08:28:35Z |
An Iterative Geometric Mean Decomposition Algorithm for MIMO Communications Systems
|
Chen, Chiao-En; Tsai, Yu-Cheng; Yang, Chia-Hsiang |
| 國立交通大學 |
2014-12-13T10:49:46Z |
開發新式骨導式人工耳蝸---子計畫三：骨導式人工耳蝸之可程式化低能耗數位訊號處理器設計( III )
|
楊家驤; Yang Chia-Hsiang |
| 國立交通大學 |
2014-12-13T10:49:46Z |
總量5Gbps等級之第五代行動通訊傳收系統與關鍵晶片設計技術---子計畫六：非正交多載波系統具全雙工收發之遞迴解碼器設計( I )
|
楊家驤; Yang Chia-Hsiang |
| 國立交通大學 |
2014-12-13T10:42:27Z |
可程式化生醫訊號量測之低能耗數位訊號處理核心
|
楊家驤; Yang Chia-Hsiang |
| 國立交通大學 |
2014-12-13T10:41:24Z |
開發新式骨導式人工耳蝸-子計畫三：骨導式人工耳蝸之可程式化低能耗數位訊號處理器設計( I )
|
楊家驤; Yang Chia-Hsiang |
| 國立交通大學 |
2014-12-13T10:32:36Z |
開發新式骨導式人工耳蝸---子計畫三：骨導式人工耳蝸之可程式化低能耗數位訊號處理器設計( II )
|
楊家驤; Yang Chia-Hsiang |
| 國立交通大學 |
2014-12-12T02:45:32Z |
一個超低電壓抗錯有限脈衝濾波器
|
羅其偉; Lo, Chi-Wei; 楊家驤; Yang, Chia-Hsiang |
| 國立交通大學 |
2014-12-12T02:45:31Z |
60 GHz頻帶室內無線數位基頻接收機及具時序錯誤容忍功能電路之設計
|
劉瑋昌; Liu, Wei-Chang; 周世傑; 楊家驤; Jou, Shyh-Jye; Yang, Chia-Hsiang |
| 國立交通大學 |
2014-12-12T02:45:31Z |
一個具平行化演算法之廣義上三角分解處理器
|
周俊瑋; Chou, Chun-Wei; 楊家驤; Yang, Chia-Hsiang |
| 國立交通大學 |
2014-12-12T02:45:31Z |
適用於多天線系統之幾何平均值分解處理器
|
蔡雨澄; Tsai, Yu-Cheng; 楊家驤; Yang, Chia-Hsiang |
| 國立交通大學 |
2014-12-08T15:36:49Z |
A 5.4 mu W Soft-Decision BCH Decoder for Wireless Body Area Networks
|
Yang, Chia-Hsiang; Huang, Ting-Ying; Li, Mao-Ruei; Ueng, Yeong-Luh |
| 國立交通大學 |
2014-12-08T15:36:49Z |
A Fully Parallel LDPC Decoder Architecture Using Probabilistic Min-Sum Algorithm for High-Throughput Applications
|
Cheng, Chung-Chao; Yang, Jeng-Da; Lee, Huang-Chang; Yang, Chia-Hsiang; Ueng, Yeong-Luh |
| 國立交通大學 |
2014-12-08T15:33:56Z |
A Fully Integrated 8-Channel Closed-Loop Neural-Prosthetic CMOS SoC for Real-Time Epileptic Seizure Control
|
Chen, Wei-Ming; Chiueh, Herming; Chen, Tsan-Jieh; Ho, Chia-Lun; Jeng, Chi; Ker, Ming-Dou; Lin, Chun-Yu; Huang, Ya-Chun; Chou, Chia-Wei; Fan, Tsun-Yuan; Cheng, Ming-Seng; Hsin, Yue-Loong; Liang, Sheng-Fu; Wang, Yu-Lin; Shaw, Fu-Zen; Huang, Yu-Hsing; Yang, Chia-Hsiang; Wu, Chung-Yu |
| 國立交通大學 |
2014-12-08T15:33:12Z |
Power and Area Reduction in Multi-Stage Addition Using Operand Segmentation
|
Chan, Ching-Da; Liu, Wei-Chang; Yang, Chia-Hsiang; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-08T15:31:59Z |
A hierarchical approach for online temporal lobe seizure detection in long-term intracranial EEG recordings
|
Liang, Sheng-Fu; Chen, Yi-Chun; Wang, Yu-Lin; Chen, Pin-Tzu; Yang, Chia-Hsiang; Chiueh, Herming |
| 國立交通大學 |
2014-12-08T15:30:54Z |
Hardware-Efficient EVD Processor Architecture in FastICA for Epileptic Seizure Detection
|
Shih, Yi-Hsin; Chen, Tsan-Jieh; Yang, Chia-Hsiang; Chiueh, Herming |
| 國立交通大學 |
2014-12-08T15:24:02Z |
A 7.4-mW 200-MS/s Wideband Spectrum Sensing Digital Baseband Processor for Cognitive Radios
|
Yu, Tsung-Han; Yang, Chia-Hsiang; Cabric, Danijela; Markovic, Dejan |
| 國立交通大學 |
2014-12-08T15:21:55Z |
Power and Area Minimization of Reconfigurable FFT Processors: A 3GPP-LTE Example
|
Yang, Chia-Hsiang; Yu, Tsung-Han; Markovic, Dejan |
| 國立成功大學 |
2014-01 |
A Fully Integrated 8-Channel Closed-Loop Neural-Prosthetic CMOS SoC for Real-Time Epileptic Seizure Control
|
Chen, Wei-Ming; Chiueh, Herming; Chen, Tsan-Jieh; Ho, Chia-Lun; Jeng, Chi; Ker, Ming-Dou; Lin, Chun-Yu; Huang, Ya-Chun; Chou, Chia-Wei; Fan, Tsun-Yuan; Cheng, Ming-Seng; Hsin, Yue-Loong; Liang, Sheng-Fu; Wang, Yu-Lin; Shaw, Fu-Zen; Huang, Yu-Hsing; Yang, Chia-Hsiang; Wu, Chung-Yu |
| 臺北醫學大學 |
2014 |
A Fully Integrated Nose-on-a-Chip for Rapid Diagnosis of Ventilator-Associated Pneumonia
|
Chiu, Shih-Wen;Wang, Jen-Huo;Chang, Kwuang-Han;Chang, Ting-Hau;Wang, Chia-Min;Chang, Chia-Lin;Tang, Chen-Ting;Chen, Chien-Fu;Shih, Chung-Hung;Kuo, Han-Wen;Wang, Li-Chun;Chen, Hsin;Hsieh, Chih-Cheng;Chang, Meng-Fan;Liu, Yi-Wen;Chen, Tsan-Jieh;Yang, Chia-Hsiang;Chiueh, Herming;Shyu, Juyo-Min;Tang, Kea-Tiong |
| 國立成功大學 |
2013-08 |
A hierarchical approach for online temporal lobe seizure detection in long-term intracranial EEG recordings
|
Liang, Sheng-Fu; Chen, Yi-Chun; Wang, Yu-Lin; Chen, Pin-Tzu; Yang, Chia-Hsiang; Chiueh, Herming |
顯示項目 41-65 / 71 (共3頁)
<< < 1 2 3 > >>
每頁顯示[10|25|50]項目
|
