|
"yang chia lin"的相關文件
顯示項目 26-35 / 190 (共19頁) << < 1 2 3 4 5 6 7 8 9 10 > >> 每頁顯示[10|25|50]項目
臺大學術典藏 |
2020-05-04T07:27:51Z |
An energy-efficient virtual memory system with flash memory as the secondary storage.
|
Tseng, Hung-Wei;Li, Han-Lin;Yang, Chia-Lin; Tseng, Hung-Wei; Li, Han-Lin; Yang, Chia-Lin; CHIA-LIN YANG |
臺大學術典藏 |
2020-05-04T07:27:51Z |
A Space-Efficient Caching Mechanism for Flash-Memory Address Translation.
|
Wu, Chin-Hsien; Kuo, Tei-Wei; Yang, Chia-Lin; CHIA-LIN YANG |
臺大學術典藏 |
2020-05-04T07:27:50Z |
Post-placement leakage optimization for partially dynamically reconfigurable FPGAs.
|
Li, Chi-Feng; Yuh, Ping-Hung; Yang, Chia-Lin; Chang, Yao-Wen; CHIA-LIN YANG |
臺大學術典藏 |
2020-05-04T07:27:50Z |
Efficient obstacle-avoiding rectilinear steiner tree construction.
|
CHIA-LIN YANG; Yang, Chia-Lin; Chang, Yao-Wen; Li, Chi-Feng; Chen, Szu-Yu; Lin, Chung-Wei |
臺大學術典藏 |
2020-05-04T07:27:49Z |
PPT: joint performance/power/thermal management of DRAM memory for multi-core systems.
|
Lin, Chung-Hsiang;Yang, Chia-Lin;King, Ku-Jei; Lin, Chung-Hsiang; Yang, Chia-Lin; King, Ku-Jei; CHIA-LIN YANG |
臺大學術典藏 |
2020-05-04T07:27:49Z |
A progressive-ILP based routing algorithm for cross-referencing biochips.
|
Yuh, Ping-Hung;Sapatnekar, Sachin S.;Yang, Chia-Lin;Chang, Yao-Wen; Yuh, Ping-Hung; Sapatnekar, Sachin S.; Yang, Chia-Lin; Chang, Yao-Wen; CHIA-LIN YANG |
臺大學術典藏 |
2020-05-04T07:27:49Z |
Cache leakage control mechanism for hard real-time systems.
|
Chi, Jaw-Wei;Yang, Chia-Lin;Chen, Yi-Jung;Chen, Jian-Jia; Chi, Jaw-Wei; Yang, Chia-Lin; Chen, Yi-Jung; Chen, Jian-Jia; CHIA-LIN YANG |
臺大學術典藏 |
2020-05-04T07:27:49Z |
BioRoute: a network-flow based routing algorithm for digital microfluidic biochips.
|
Yuh, Ping-Hung; Yang, Chia-Lin; Chang, Yao-Wen; CHIA-LIN YANG |
臺大學術典藏 |
2020-05-04T07:27:49Z |
3D Video Applications and Intelligent Video Surveillance Camera and its VLSI Design.
|
Chien, Shao-Yi; Shih, Chi-Sheng; Ku, Mong-Kai; Yang, Chia-Lin; Chang, Yao-Wen; Kuo, Tei-Wei; Chen, Liang-Gee; CHIA-LIN YANG |
臺大學術典藏 |
2020-05-04T07:27:48Z |
Hierarchical memory scheduling for multimedia MPSoCs.
|
Lin, Ye-Jyun;Yang, Chia-Lin;Lin, Tay-Jyi;Huang, Jiao-Wei;Chang, Naehyuck; Lin, Ye-Jyun; Yang, Chia-Lin; Lin, Tay-Jyi; Huang, Jiao-Wei; Chang, Naehyuck; CHIA-LIN YANG |
顯示項目 26-35 / 190 (共19頁) << < 1 2 3 4 5 6 7 8 9 10 > >> 每頁顯示[10|25|50]項目
|